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Dana Zlotnik149203b2022-01-26 12:38:03 +02001/*
Matthew Bentham7d9a78e2023-05-31 13:18:33 +00002 * Copyright (c) 2020-2023 Arm Limited.
Dana Zlotnik149203b2022-01-26 12:38:03 +02003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "src/cpu/kernels/CpuMaxUnpoolingLayerKernel.h"
25
26#include "arm_compute/core/TensorInfo.h"
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010027#include "arm_compute/core/utils/misc/ShapeCalculator.h"
Dana Zlotnik149203b2022-01-26 12:38:03 +020028#include "arm_compute/core/Validate.h"
29#include "arm_compute/core/Window.h"
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010030
Dana Zlotnik149203b2022-01-26 12:38:03 +020031#include "src/core/common/Registrars.h"
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010032#include "src/core/CPP/Validate.h"
Dana Zlotnik149203b2022-01-26 12:38:03 +020033#include "src/core/helpers/AutoConfiguration.h"
34#include "src/core/helpers/WindowHelpers.h"
35#include "src/cpu/kernels/maxunpool/list.h"
Dana Zlotnik149203b2022-01-26 12:38:03 +020036
37namespace arm_compute
38{
39namespace cpu
40{
41namespace kernels
42{
43using namespace misc::shape_calculator;
44
45namespace
46{
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010047static const std::vector<CpuMaxUnpoolingLayerKernel::MaxUnpoolingKernel> available_kernels = {
48 {"neon_fp32_maxunpooling", [](const DataTypeISASelectorData &data) { return data.dt == DataType::F32; },
49 REGISTER_FP32_NEON(neon_fp32_maxunpooling)},
50 {"neon_fp16_maxunpooling",
51 [](const DataTypeISASelectorData &data) { return data.dt == DataType::F16 && data.isa.fp16; },
52 REGISTER_FP16_NEON(neon_fp16_maxunpooling)},
53 {"neon_qu8_maxunpooling", [](const DataTypeISASelectorData &data) { return data.dt == DataType::QASYMM8; },
54 REGISTER_QASYMM8_NEON(neon_qs8_maxunpooling)},
55 {"neon_qs8_maxunpooling", [](const DataTypeISASelectorData &data) { return data.dt == DataType::QASYMM8_SIGNED; },
56 REGISTER_QASYMM8_SIGNED_NEON(neon_qu8_maxunpooling)},
Dana Zlotnik149203b2022-01-26 12:38:03 +020057};
58
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010059Status validate_arguments(const ITensorInfo *src,
60 const ITensorInfo *indices,
61 const ITensorInfo *dst,
62 const PoolingLayerInfo &pool_info)
Dana Zlotnik149203b2022-01-26 12:38:03 +020063{
64 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, indices, dst);
65 ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(src);
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010066 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src, 1, DataType::QASYMM8, DataType::QASYMM8_SIGNED,
67 DataType::F16, DataType::F32);
Dana Zlotnik149203b2022-01-26 12:38:03 +020068 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(indices, 1, DataType::U32);
69 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_SHAPES(src, indices);
70
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010071 int pool_stride_x = 0;
72 int pool_stride_y = 0;
73 PoolingType pool_type = pool_info.pool_type;
74 const PadStrideInfo pad_stride_info = pool_info.pad_stride_info;
Dana Zlotnik149203b2022-01-26 12:38:03 +020075 std::tie(pool_stride_x, pool_stride_y) = pad_stride_info.stride();
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010076 const int pool_size_x = pool_info.pool_size.width;
77 const int pool_size_y = pool_info.pool_size.height;
Dana Zlotnik149203b2022-01-26 12:38:03 +020078 const Size2D pool_size(pool_size_x, pool_size_y);
79
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010080 ARM_COMPUTE_RETURN_ERROR_ON_MSG(pool_type != PoolingType::MAX,
81 "Pooling indices only supported for MAX pooling method");
Dana Zlotnik149203b2022-01-26 12:38:03 +020082 ARM_COMPUTE_RETURN_ERROR_ON_MSG((pool_size != Size2D(2, 2)), "Pooling indices only supported for pool size 2x2");
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010083 if (dst->total_size() != 0)
Dana Zlotnik149203b2022-01-26 12:38:03 +020084 {
85 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, dst);
86 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_LAYOUT(src, dst);
87 }
88
89 return Status{};
90}
91} // namespace
92
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +010093void CpuMaxUnpoolingLayerKernel::configure(const ITensorInfo *src,
94 const ITensorInfo *indices,
95 ITensorInfo *dst,
96 const PoolingLayerInfo &pool_info)
Dana Zlotnik149203b2022-01-26 12:38:03 +020097{
98 ARM_COMPUTE_ERROR_ON_NULLPTR(src, dst, indices);
99 ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(src, indices, dst, pool_info));
100 ARM_COMPUTE_UNUSED(indices);
101
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +0100102 const auto uk = CpuMaxUnpoolingLayerKernel::get_implementation(
103 DataTypeISASelectorData{src->data_type(), CPUInfo::get().get_isa()});
Dana Zlotnik149203b2022-01-26 12:38:03 +0200104 ARM_COMPUTE_ERROR_ON_NULLPTR(uk);
105 _run_method = uk->ukernel;
106
107 const TensorShape output_shape = compute_unpool_shape(*src, pool_info);
108 auto_init_if_empty(*dst, src->clone()->set_tensor_shape(output_shape));
109
110 auto window = calculate_max_window(*src, Steps());
111 ICpuKernel::configure(window);
112}
113
Felix Thomasmathibalanafd38f02023-09-27 17:46:17 +0100114Status CpuMaxUnpoolingLayerKernel::validate(const ITensorInfo *src,
115 const ITensorInfo *indices,
116 const ITensorInfo *dst,
117 const PoolingLayerInfo &pool_info)
Dana Zlotnik149203b2022-01-26 12:38:03 +0200118{
119 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, indices, dst);
120 ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(src, indices, dst, pool_info));
121 return Status{};
122}
123
124void CpuMaxUnpoolingLayerKernel::run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info)
125{
126 ARM_COMPUTE_UNUSED(info);
127 ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
128 ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICpuKernel::window(), window);
129
130 const auto src = tensors.get_const_tensor(TensorType::ACL_SRC_0);
131 const auto indices = tensors.get_const_tensor(TensorType::ACL_SRC_1);
132 const auto dst = tensors.get_tensor(TensorType::ACL_DST);
133
134 _run_method(src, indices, dst, window);
135}
136
137const char *CpuMaxUnpoolingLayerKernel::name() const
138{
139 return "CpuMaxUnpoolingLayerKernel";
140}
141
142const std::vector<CpuMaxUnpoolingLayerKernel::MaxUnpoolingKernel> &CpuMaxUnpoolingLayerKernel::get_available_kernels()
143{
144 return available_kernels;
145}
146} // namespace kernels
147} // namespace cpu
Matthew Bentham7d9a78e2023-05-31 13:18:33 +0000148} // namespace arm_compute