Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 1 | /* |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 2 | * Copyright (c) 2021-2022 Arm Limited. |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
Georgios Pinitas | 7891a73 | 2021-08-20 21:39:25 +0100 | [diff] [blame] | 24 | #include "src/cpu/operators/CpuWinogradConv2d.h" |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 25 | #include "arm_compute/core/Error.h" |
| 26 | #include "arm_compute/core/Utils.h" |
| 27 | #include "arm_compute/core/Validate.h" |
| 28 | #include "arm_compute/core/utils/misc/ShapeCalculator.h" |
| 29 | #include "arm_compute/core/utils/quantization/AsymmHelpers.h" |
| 30 | #include "arm_compute/runtime/FunctionDescriptors.h" |
| 31 | #include "arm_compute/runtime/NEON/NEScheduler.h" |
ramelg01 | 3ae3d88 | 2021-09-12 23:07:47 +0100 | [diff] [blame] | 32 | #include "src/common/utils/Log.h" |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 33 | #include "src/core/CPP/Validate.h" |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 34 | #include "src/core/NEON/kernels/assembly/winograd.hpp" |
| 35 | #include "src/core/NEON/kernels/convolution/common/tensor.hpp" |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 36 | #include "src/core/NEON/kernels/convolution/common/utils.hpp" |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 37 | #include "src/core/helpers/MemoryHelpers.h" |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 38 | #include "src/core/helpers/WindowHelpers.h" |
| 39 | #include "src/core/utils/AssemblyUtils.h" |
Georgios Pinitas | 7891a73 | 2021-08-20 21:39:25 +0100 | [diff] [blame] | 40 | #include "src/cpu/kernels/CpuWinogradConv2dKernel.h" |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 41 | #include "src/cpu/kernels/assembly/arm_gemm.hpp" |
Georgios Pinitas | 7891a73 | 2021-08-20 21:39:25 +0100 | [diff] [blame] | 42 | #include "src/cpu/operators/CpuActivation.h" |
| 43 | #include "src/cpu/operators/CpuPermute.h" |
Georgios Pinitas | 7891a73 | 2021-08-20 21:39:25 +0100 | [diff] [blame] | 44 | #include "src/cpu/utils/CpuAuxTensorHandler.h" |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 45 | #include "support/Cast.h" |
| 46 | |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 47 | namespace arm_compute |
| 48 | { |
| 49 | namespace cpu |
| 50 | { |
| 51 | using namespace arm_compute::experimental; |
| 52 | using namespace arm_compute::utils::cast; |
| 53 | |
| 54 | namespace |
| 55 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 56 | inline Tensor4DShape internal_get_shape(const ITensorInfo *in) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 57 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 58 | const DataLayout data_layout = in->data_layout(); |
| 59 | const int in_width = in->dimension(get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH)); |
| 60 | const int in_height = in->dimension(get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT)); |
| 61 | const int in_channels = in->dimension(get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL)); |
| 62 | const int in_batches = in->dimension(get_data_layout_dimension_index(data_layout, DataLayoutDimension::BATCHES)); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 63 | |
| 64 | return Tensor4DShape{ in_batches, in_height, in_width, in_channels }; |
| 65 | } |
| 66 | |
Michele Di Giorgio | d9cdf14 | 2021-07-02 15:17:08 +0100 | [diff] [blame] | 67 | Status validate_arguments(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const PadStrideInfo &conv_info) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 68 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 69 | ARM_COMPUTE_UNUSED(dst, weights); |
Michele Di Giorgio | d9cdf14 | 2021-07-02 15:17:08 +0100 | [diff] [blame] | 70 | ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(src); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 71 | |
| 72 | ARM_COMPUTE_RETURN_ERROR_ON_MSG(conv_info.stride().first != 1 || conv_info.stride().second != 1, "Winograd layer only supports unit strides."); |
| 73 | if(biases != nullptr) |
| 74 | { |
Michele Di Giorgio | d9cdf14 | 2021-07-02 15:17:08 +0100 | [diff] [blame] | 75 | ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, biases); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 76 | ARM_COMPUTE_RETURN_ERROR_ON(biases->num_dimensions() > 1); |
| 77 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 78 | ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src, 1, DataType::F16, DataType::F32); |
| 79 | ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, weights); |
| 80 | return Status{}; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 81 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 82 | |
| 83 | bool get_winograd_kernel_implementation(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *dst, |
| 84 | const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, bool enable_fast_math, |
| 85 | arm_conv::winograd::WinogradImpl *winograd_impl, std::unique_ptr<arm_conv::ConvolutionArgs> &conv_args) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 86 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 87 | arm_conv::winograd::WinogradConfig winograd_cfg; |
| 88 | arm_gemm::GemmConfig cfg; |
| 89 | |
| 90 | const DataType data_type = src->data_type(); |
| 91 | Tensor4DShape in_shape{ internal_get_shape(src) }; |
| 92 | Tensor4DShape out_shape{ internal_get_shape(dst) }; |
| 93 | Tensor4DShape kernel_shape{ internal_get_shape(weights) }; |
| 94 | uint32_t nthreads = NEScheduler::get().num_threads(); |
| 95 | // Get configuration arguments for Winograd |
| 96 | winograd_cfg.output_rows = 0; |
| 97 | winograd_cfg.output_cols = 0; |
| 98 | conv_args = std::make_unique<arm_conv::ConvolutionArgs>( |
| 99 | in_shape.n_batches, |
| 100 | arm_conv::Shape2D{ static_cast<uint32_t>(in_shape.n_rows), static_cast<uint32_t>(in_shape.n_cols) }, |
| 101 | in_shape.n_channels, |
| 102 | conv_info.pad_top(), |
| 103 | conv_info.pad_left(), |
| 104 | arm_conv::Shape2D{ static_cast<uint32_t>(out_shape.n_rows), static_cast<uint32_t>(out_shape.n_cols) }, |
| 105 | out_shape.n_channels, |
| 106 | arm_conv::Shape2D{ static_cast<uint32_t>(kernel_shape.n_rows), static_cast<uint32_t>(kernel_shape.n_cols) }, |
| 107 | assembly_utils::map_to_arm_gemm_activation(act_info)); |
| 108 | |
| 109 | bool success = false; |
| 110 | if(data_type == DataType::F32) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 111 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 112 | success = arm_conv::winograd::get_implementation<float>( |
| 113 | *winograd_impl, &CPUInfo::get(), *conv_args, nthreads, enable_fast_math, &winograd_cfg, nullptr); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 114 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 115 | #if defined(__aarch64__) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) |
| 116 | else if(data_type == DataType::F16) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 117 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 118 | success = arm_conv::winograd::get_implementation<__fp16>( |
| 119 | *winograd_impl, &CPUInfo::get(), *conv_args, nthreads, enable_fast_math, &winograd_cfg, nullptr); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 120 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 121 | #endif // defined(__aarch64__) && defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) |
| 122 | else |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 123 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 124 | success = false; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 125 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 126 | return success; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 127 | } |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 128 | inline bool fuse_function_supported(const ActivationLayerInfo &act_info) |
| 129 | { |
| 130 | return act_info.activation() == ActivationLayerInfo::ActivationFunction::RELU || act_info.activation() == ActivationLayerInfo::ActivationFunction::BOUNDED_RELU; |
| 131 | } |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 132 | } // namespace |
| 133 | |
| 134 | CpuWinogradConv2d::CpuWinogradConv2d() |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 135 | |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 136 | : _gemm_function(std::make_unique<CpuGemm>()), |
| 137 | _activation_func(std::make_unique<CpuActivation>()), |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 138 | _transform_input_kernel(nullptr), |
| 139 | _transform_output_kernel(nullptr), |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 140 | _permute_input(std::make_unique<CpuPermute>()), |
| 141 | _permute_output(std::make_unique<CpuPermute>()), |
| 142 | _permute_weights(std::make_unique<CpuPermute>()), |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 143 | _aux_mem(AuxTensorIdx::Count), |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 144 | _conv_args{ nullptr }, |
| 145 | _winograd_impl{}, |
| 146 | _data_layout(), |
| 147 | _winograd_transformed_input{}, |
| 148 | _winograd_transformed_output{}, |
| 149 | _winograd_transformed_weights{}, |
| 150 | _input_workspace(), |
| 151 | _output_workspace(), |
| 152 | _weights_hwio(), |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 153 | _input_nhwc(), |
| 154 | _output_nhwc(), |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 155 | _is_prepared{ false }, |
| 156 | _run_activation{ false } |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 157 | { |
| 158 | } |
| 159 | |
| 160 | CpuWinogradConv2d::~CpuWinogradConv2d() = default; |
| 161 | |
| 162 | void CpuWinogradConv2d::configure(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, |
| 163 | const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, bool enable_fast_math) |
| 164 | { |
| 165 | ARM_COMPUTE_ERROR_ON_NULLPTR(src, weights, dst); |
Ramy Elgammal | e4e3b2e | 2022-09-07 12:38:46 +0100 | [diff] [blame] | 166 | ARM_COMPUTE_ERROR_THROW_ON(validate(src, weights, biases, dst, conv_info, act_info, enable_fast_math)); |
ramelg01 | 3ae3d88 | 2021-09-12 23:07:47 +0100 | [diff] [blame] | 167 | ARM_COMPUTE_LOG_PARAMS(src, weights, biases, dst, conv_info, act_info, enable_fast_math); |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 168 | ARM_COMPUTE_UNUSED(biases); |
| 169 | const DataType data_type = src->data_type(); |
| 170 | uint32_t nthreads = NEScheduler::get().num_threads(); |
| 171 | _data_layout = src->data_layout(); |
| 172 | const Tensor4DShape kernel_shape{ internal_get_shape(weights) }; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 173 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 174 | bool success = get_winograd_kernel_implementation(src, weights, dst, conv_info, act_info, enable_fast_math, &_winograd_impl, _conv_args); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 175 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 176 | ARM_COMPUTE_EXIT_ON_MSG_VAR(!success, "Unsupported kernel size: %d x %d.\n", kernel_shape.n_rows, kernel_shape.n_cols); |
| 177 | ARM_COMPUTE_LOG_MSG_WITH_FORMAT_ACL(arm_compute::logging::LogLevel::INFO, "Using input transform: %s\n", _winograd_impl.input_transform->get_name().c_str()); |
| 178 | ARM_COMPUTE_LOG_MSG_WITH_FORMAT_ACL(arm_compute::logging::LogLevel::INFO, "Using weight transform: %s\n", _winograd_impl.input_transform->get_name().c_str()); |
| 179 | ARM_COMPUTE_LOG_MSG_WITH_FORMAT_ACL(arm_compute::logging::LogLevel::INFO, "Using output transform: %s\n", _winograd_impl.input_transform->get_name().c_str()); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 180 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 181 | const bool has_impl = ((_winograd_impl.input_transform != nullptr) && (_winograd_impl.output_transform != nullptr) && (_winograd_impl.gemm_args != nullptr)); |
| 182 | if(has_impl) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 183 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 184 | // Determine how much working space is required, allocate it. |
| 185 | const size_t input_workspace_size = _winograd_impl.input_transform->get_working_space_size(*_conv_args, nthreads); |
| 186 | const size_t output_workspace_size = _winograd_impl.output_transform->get_working_space_size(*_conv_args, nthreads); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 187 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 188 | TensorInfo input_workspace_info(TensorShape(input_workspace_size), 1, DataType::U8); |
| 189 | TensorInfo output_workspace_info(TensorShape(output_workspace_size), 1, DataType::U8); |
| 190 | _input_workspace = input_workspace_info; |
| 191 | _output_workspace = output_workspace_info; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 192 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 193 | const auto &wds = _winograd_impl.winograd_spec; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 194 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 195 | // Preparing winograd transformed input tensor |
| 196 | const size_t data_type_size = src->element_size(); |
| 197 | const uint32_t m = _winograd_impl.gemm_args->_Msize; // Total number of tiles |
| 198 | const uint32_t k = _winograd_impl.gemm_args->_Ksize; // Input channels |
| 199 | const uint32_t n = _winograd_impl.gemm_args->_Nsize; // Output channels |
| 200 | const uint32_t n_gemms = _winograd_impl.gemm_args->_nmulti; |
| 201 | const uint32_t n_batches = _winograd_impl.gemm_args->_nbatches; |
| 202 | constexpr size_t storage_alignment = 64; |
| 203 | |
| 204 | const TensorShape a_shape(k, m, n_batches, n_gemms); |
| 205 | Strides a_strides(data_type_size); |
| 206 | a_strides.set(1, data_type_size * _winograd_impl.winograd_spec.input_ld_row); |
| 207 | a_strides.set(2, data_type_size * _winograd_impl.winograd_spec.input_ld_batch); |
| 208 | a_strides.set(3, data_type_size * _winograd_impl.winograd_spec.input_ld_matrix); |
| 209 | |
| 210 | const TensorShape b_shape(n, k, n_gemms); |
| 211 | Strides b_strides(data_type_size); |
| 212 | b_strides.set(1, data_type_size * _winograd_impl.winograd_spec.weight_ld_row); |
| 213 | b_strides.set(2, data_type_size * _winograd_impl.winograd_spec.weight_ld_matrix); |
| 214 | |
| 215 | const TensorShape d_shape(n, m, n_batches, n_gemms); |
| 216 | Strides d_strides(data_type_size); |
| 217 | d_strides.set(1, data_type_size * _winograd_impl.winograd_spec.output_ld_row); |
| 218 | d_strides.set(2, data_type_size * _winograd_impl.winograd_spec.output_ld_batch); |
| 219 | d_strides.set(3, data_type_size * _winograd_impl.winograd_spec.output_ld_matrix); |
| 220 | |
| 221 | TensorInfo a_info{}; |
| 222 | TensorInfo b_info{}; |
| 223 | TensorInfo d_info{}; |
| 224 | a_info.init(a_shape, 1, data_type, a_strides, 0, wds.input_matrix_size_bytes); |
| 225 | b_info.init(b_shape, 1, data_type, b_strides, 0, wds.weight_matrix_size_bytes); |
| 226 | d_info.init(d_shape, 1, data_type, d_strides, 0, wds.output_matrix_size_bytes); |
| 227 | |
| 228 | _winograd_transformed_input = a_info; |
| 229 | _winograd_transformed_weights = b_info; |
| 230 | _winograd_transformed_output = d_info; |
| 231 | |
| 232 | PermutationVector weights_permutation_vector(3U, 0U, 1U, 2U); |
| 233 | |
| 234 | // Configure the kernel to transform the input tensor from NCHW -> NHWC |
| 235 | if(_data_layout == DataLayout::NCHW) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 236 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 237 | _permute_input->configure(src, &_input_nhwc, PermutationVector(2U, 0U, 1U)); |
| 238 | weights_permutation_vector = PermutationVector(3U, 2U, 0U, 1U); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 239 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 240 | |
| 241 | // Re-order a weight tensor from [Output feature map x Input feature map x Height x Width] to [Height x Width x Input feature map x Output feature map] |
| 242 | _permute_weights->configure(weights, &_weights_hwio, weights_permutation_vector); |
| 243 | |
| 244 | // Reorder the convoluted output to ACL's ordering NCHW |
| 245 | if(_data_layout == DataLayout::NCHW) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 246 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 247 | // configure and allocate dst tensor to be used to convert from winograd domain to spatial domain when calling to reshape_output() |
| 248 | TensorInfo info(TensorShape(dst->dimension(2), dst->dimension(0), |
| 249 | dst->dimension(1), dst->dimension(3)), |
| 250 | 1, dst->data_type()); |
| 251 | _output_nhwc = info; |
| 252 | _permute_output->configure(&_output_nhwc, dst, PermutationVector(1U, 2U, 0U)); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 253 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 254 | |
Viet-Hoa Do | 65c8db8 | 2022-08-03 16:39:23 +0100 | [diff] [blame] | 255 | // Configure input transform kernel |
| 256 | _transform_input_kernel = std::make_unique<CpuWinogradConv2dTransformInputKernel>(_winograd_impl, *_conv_args, nthreads); |
| 257 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 258 | // Configure GEMM function |
| 259 | _gemm_function->configure(&_winograd_transformed_input, &_winograd_transformed_weights, nullptr, &_winograd_transformed_output, 1.0f, 0.f); |
| 260 | |
Viet-Hoa Do | 65c8db8 | 2022-08-03 16:39:23 +0100 | [diff] [blame] | 261 | // Configure output transform kernel |
| 262 | _transform_output_kernel = std::make_unique<CpuWinogradConv2dTransformOutputKernel>(_winograd_impl, *_conv_args, nthreads); |
| 263 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 264 | //Configure Activation Layer |
| 265 | _run_activation = act_info.enabled() && !fuse_function_supported(act_info); |
| 266 | if(_run_activation) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 267 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 268 | _activation_func->configure(dst, nullptr, act_info); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 269 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 270 | |
| 271 | auto asm_mem_req = _gemm_function->workspace(); |
| 272 | _aux_mem[GemmWorkspace] = asm_mem_req[GemmWorkspace]; |
| 273 | _aux_mem[Pretranspose] = asm_mem_req[Pretranspose]; |
| 274 | _aux_mem[InterleavedLHS] = asm_mem_req[InterleavedLHS]; |
| 275 | _aux_mem[TransposedRHS] = asm_mem_req[TransposedRHS]; |
| 276 | _aux_mem[TempResult] = asm_mem_req[TempResult]; |
| 277 | |
| 278 | // Request temporary memory. Overlap memory needed for Input/Output transformations as they run on different non-overlapping time-steps. |
| 279 | _aux_mem[TransformedInput] = MemoryInfo(offset_int_vec(TransformedInput), MemoryLifetime::Temporary, wds.input_matrix_size_bytes, storage_alignment); |
| 280 | _aux_mem[TransformedOutput] = MemoryInfo(offset_int_vec(TransformedOutput), MemoryLifetime::Temporary, wds.output_matrix_size_bytes, storage_alignment); |
| 281 | _aux_mem[WorkspaceIO] = MemoryInfo(offset_int_vec(WorkspaceIO), MemoryLifetime::Temporary, std::max(input_workspace_size, output_workspace_size)); |
| 282 | _aux_mem[PermutedWeights] = MemoryInfo(offset_int_vec(PermutedWeights), MemoryLifetime::Prepare, _weights_hwio.total_size()); |
| 283 | _aux_mem[TransformedWeights] = MemoryInfo(offset_int_vec(TransformedWeights), MemoryLifetime::Persistent, wds.weight_matrix_size_bytes, storage_alignment); |
| 284 | if(_data_layout == DataLayout::NCHW) |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 285 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 286 | _aux_mem[PermutedInput].merge(offset_int_vec(PermutedInput), src->total_size()); |
| 287 | _aux_mem[PermutedOutput].merge(offset_int_vec(PermutedOutput), dst->total_size()); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 288 | } |
Georgios Pinitas | 87a74ef | 2021-08-20 17:26:45 +0100 | [diff] [blame] | 289 | } |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 290 | } |
Michele Di Giorgio | d9cdf14 | 2021-07-02 15:17:08 +0100 | [diff] [blame] | 291 | Status CpuWinogradConv2d::validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 292 | const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, bool enable_fast_math) |
| 293 | { |
Michele Di Giorgio | d9cdf14 | 2021-07-02 15:17:08 +0100 | [diff] [blame] | 294 | ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, weights, dst); |
| 295 | ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(src, weights, biases, dst, conv_info)); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 296 | |
Ramy Elgammal | e4e3b2e | 2022-09-07 12:38:46 +0100 | [diff] [blame] | 297 | // Disable winograd for fp16 if fast math is false. |
| 298 | if(!enable_fast_math) |
| 299 | { |
| 300 | ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src, 1, DataType::F32); |
| 301 | } |
| 302 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 303 | const Tensor4DShape kernel_shape{ internal_get_shape(weights) }; |
| 304 | arm_conv::winograd::WinogradImpl winograd_impl{}; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 305 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 306 | std::unique_ptr<arm_conv::ConvolutionArgs> conv_args; |
| 307 | const bool success = get_winograd_kernel_implementation(src, weights, dst, conv_info, act_info, enable_fast_math, &winograd_impl, conv_args); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 308 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 309 | ARM_COMPUTE_RETURN_ERROR_ON_MSG_VAR(success == false, "Unsupported kernel size: %d x %d.\n", kernel_shape.n_rows, kernel_shape.n_cols); |
| 310 | ARM_COMPUTE_LOG_MSG_WITH_FORMAT_ACL(arm_compute::logging::LogLevel::INFO, "Using input transform: %s\n", winograd_impl.input_transform->get_name().c_str()); |
| 311 | ARM_COMPUTE_LOG_MSG_WITH_FORMAT_ACL(arm_compute::logging::LogLevel::INFO, "Using weight transform: %s\n", winograd_impl.input_transform->get_name().c_str()); |
| 312 | ARM_COMPUTE_LOG_MSG_WITH_FORMAT_ACL(arm_compute::logging::LogLevel::INFO, "Using output transform: %s\n", winograd_impl.input_transform->get_name().c_str()); |
| 313 | return Status{}; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 314 | } |
| 315 | |
| 316 | void CpuWinogradConv2d::run(ITensorPack &tensors) |
| 317 | { |
| 318 | prepare(tensors); |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 319 | auto src = tensors.get_const_tensor(ACL_SRC_0); |
| 320 | auto biases = tensors.get_const_tensor(ACL_SRC_2); |
| 321 | auto output = tensors.get_tensor(ACL_DST); |
| 322 | Window win; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 323 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 324 | const uint32_t nthreads = NEScheduler::get().num_threads(); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 325 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 326 | // The Winograd transform implementation does fine-grain threading inside the transforms. Just pass thread_id and nthreads. |
| 327 | win.set(Window::DimX, Window::Dimension(0, nthreads, 1)); |
| 328 | |
| 329 | // Wrap the winograd-domain tensorInfos created in configuration in tensors and allocate the required memory. |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 330 | CpuAuxTensorHandler input_nhwc(offset_int_vec(PermutedInput), _input_nhwc, tensors, true); |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 331 | CpuAuxTensorHandler winograd_input_transformed(offset_int_vec(TransformedInput), _winograd_transformed_input, tensors, true); |
Georgios Pinitas | 87a74ef | 2021-08-20 17:26:45 +0100 | [diff] [blame] | 332 | CpuAuxTensorHandler input_workspace(offset_int_vec(WorkspaceIO), _input_workspace, tensors, true); |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 333 | const bool is_nchw = _data_layout == DataLayout::NCHW; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 334 | if(is_nchw) |
| 335 | { |
| 336 | //Bring channels to the front as Winograd code expects the tensor to be in the format NHWC |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 337 | ITensorPack pack{ { ACL_SRC, src }, { ACL_DST, input_nhwc.get() } }; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 338 | _permute_input->run(pack); |
| 339 | } |
| 340 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 341 | CpuAuxTensorHandler winograd_output_transformed(offset_int_vec(TransformedOutput), _winograd_transformed_output, tensors, true); |
| 342 | CpuAuxTensorHandler output_workspace(offset_int_vec(WorkspaceIO), _output_workspace, tensors, true); |
| 343 | CpuAuxTensorHandler output_nhwc(offset_int_vec(PermutedOutput), _output_nhwc, tensors, true); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 344 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 345 | ITensorPack transform_input_pack{ { ACL_SRC, is_nchw ? input_nhwc.get() : src }, { ACL_DST, winograd_input_transformed.get() }, { ACL_INT, input_workspace.get() } }; |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 346 | NEScheduler::get().schedule_op(_transform_input_kernel.get(), Window::DimX, win, transform_input_pack); |
| 347 | |
| 348 | CpuAuxTensorHandler winograd_weights_transformed(offset_int_vec(TransformedWeights), _winograd_transformed_weights, tensors, true); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 349 | |
| 350 | // Run 16 GEMMs in multiple threads, each kernel runs one or more GEMMs |
Georgios Pinitas | 87a74ef | 2021-08-20 17:26:45 +0100 | [diff] [blame] | 351 | ITensorPack gemm_pack = tensors; |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 352 | gemm_pack.add_const_tensor(ACL_SRC, winograd_input_transformed.get()); |
| 353 | gemm_pack.add_const_tensor(ACL_SRC_1, winograd_weights_transformed.get()); |
Georgios Pinitas | 87a74ef | 2021-08-20 17:26:45 +0100 | [diff] [blame] | 354 | gemm_pack.add_const_tensor(ACL_BIAS, nullptr); |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 355 | gemm_pack.add_tensor(ACL_DST, winograd_output_transformed.get()); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 356 | _gemm_function->run(gemm_pack); |
| 357 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 358 | // Output transform |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 359 | ITensorPack transform_output_pack{ { ACL_SRC_0, winograd_output_transformed.get() }, { ACL_DST, is_nchw ? output_nhwc.get() : output }, { ACL_SRC_1, biases }, { ACL_INT, output_workspace.get() } }; |
| 360 | NEScheduler::get().schedule_op(_transform_output_kernel.get(), Window::DimX, win, transform_output_pack); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 361 | if(is_nchw) |
| 362 | { |
| 363 | // Reorder the convoluted output to ACL's ordering NCHW |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 364 | ITensorPack pack{ { ACL_SRC, output_nhwc.get() }, { ACL_DST, output } }; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 365 | _permute_output->run(pack); |
| 366 | } |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 367 | if(_run_activation) |
| 368 | { |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 369 | ITensorPack pack{ { ACL_SRC, output }, { ACL_DST, output } }; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 370 | _activation_func->run(pack); |
| 371 | } |
| 372 | } |
| 373 | |
| 374 | void CpuWinogradConv2d::prepare(ITensorPack &tensors) |
| 375 | { |
| 376 | if(!_is_prepared) |
| 377 | { |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 378 | const ITensor *weights = tensors.get_const_tensor(ACL_SRC_1); |
| 379 | ITensor *weights_aux = utils::cast::polymorphic_cast<ITensor *>(tensors.get_tensor(offset_int_vec(PermutedWeights))); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 380 | |
| 381 | CpuAuxTensorHandler permuted_weights(_weights_hwio, *weights_aux); |
| 382 | ITensorPack permute_tensors{ { ACL_SRC, weights }, { ACL_DST, permuted_weights.get() } }; |
| 383 | _permute_weights->run(permute_tensors); |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 384 | const int element_size_in_bytes = permuted_weights.get()->info()->element_size(); |
| 385 | // Weights were in OHWI format, before being permuted "permuted_weights" to be in HWIO format. |
| 386 | const unsigned int height_idx = 3; // H in HWIO |
| 387 | const unsigned int width_idx = 2; // W in HWIO |
| 388 | const unsigned int channel_idx = 1; // I in HWIO |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 389 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 390 | const int permuted_weight_row_stride = permuted_weights.get()->info()->strides_in_bytes()[height_idx] / element_size_in_bytes; |
| 391 | const int permuted_weight_col_stride = permuted_weights.get()->info()->strides_in_bytes()[width_idx] / element_size_in_bytes; |
| 392 | const int permuted_weight_channel_stride = permuted_weights.get()->info()->strides_in_bytes()[channel_idx] / element_size_in_bytes; |
| 393 | |
| 394 | // Wrap the winograd-domain transformed weight TensorInfo in Auxiliary tensor and allocate the required memory. |
Georgios Pinitas | 87a74ef | 2021-08-20 17:26:45 +0100 | [diff] [blame] | 395 | ITensor *weights_transf = utils::cast::polymorphic_cast<ITensor *>(tensors.get_tensor(offset_int_vec(TransformedWeights))); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 396 | ARM_COMPUTE_ERROR_ON_NULLPTR(weights_transf); |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 397 | CpuAuxTensorHandler winograd_transformed_weights(_winograd_transformed_weights, *weights_transf); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 398 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 399 | const void *permuted_weights_ptr; |
| 400 | void *win_wght_transf_ptr; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 401 | |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 402 | permuted_weights_ptr = reinterpret_cast<const void *>(permuted_weights.get()->buffer() + permuted_weights.get()->info()->offset_first_element_in_bytes()); |
| 403 | win_wght_transf_ptr = reinterpret_cast<void *>(winograd_transformed_weights.get()->buffer() + winograd_transformed_weights.get()->info()->offset_first_element_in_bytes()); |
| 404 | |
| 405 | // Prepare Weights |
| 406 | _winograd_impl.weight_transform->execute( |
| 407 | *_conv_args, |
| 408 | permuted_weights_ptr, |
| 409 | permuted_weight_row_stride, |
| 410 | permuted_weight_col_stride, |
| 411 | permuted_weight_channel_stride, |
| 412 | win_wght_transf_ptr, |
| 413 | _winograd_impl.winograd_spec, |
| 414 | 0, 1 // Thread 1 of 1 |
| 415 | ); |
Georgios Pinitas | 6634194 | 2021-07-30 12:21:07 +0100 | [diff] [blame] | 416 | ITensorPack gemm_pack = tensors; |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 417 | gemm_pack.add_const_tensor(ACL_SRC_1, winograd_transformed_weights.get()); |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 418 | _gemm_function->prepare(gemm_pack); |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 419 | _is_prepared = 1; |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 420 | } |
| 421 | } |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 422 | experimental::MemoryRequirements CpuWinogradConv2d::workspace() const |
| 423 | { |
| 424 | return _aux_mem; |
| 425 | } |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 426 | |
Michalis Spyrou | 96f977e | 2021-07-01 12:20:56 +0100 | [diff] [blame] | 427 | } // namespace cpu |
ramelg01 | a1f7851 | 2022-06-29 16:28:10 +0100 | [diff] [blame] | 428 | } // namespace arm_compute |