blob: d12f3c60c03ebad05bc588a07652f100a25ee52d [file] [log] [blame]
ramelg01a1f78512022-06-29 16:28:10 +01001/*
Pablo Tello7594f982023-01-30 14:19:24 +00002 * Copyright (c) 2022-2023 Arm Limited.
ramelg01a1f78512022-06-29 16:28:10 +01003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25#include "winograd_implementations.hpp"
26#include "weight_transform.hpp"
27
28namespace arm_conv {
29namespace winograd {
30namespace weight_transform {
31
32#if defined(__aarch64__)
33#if defined(ARM_COMPUTE_ENABLE_SVE)
34#endif // defined(ARM_COMPUTE_ENABLE_SVE)
35#endif // defined(__aarch64__)
Pablo Tello7594f982023-01-30 14:19:24 +000036void arm_fp32_4x4_3x3(unsigned int, const float *, size_t, size_t, float *, size_t);
37void arm_fp32_2x2_3x3(unsigned int, const float *, size_t, size_t, float *, size_t);
38void arm_fp32_2x2_5x5(unsigned int, const float *, size_t, size_t, float *, size_t);
39void cpp_fp32_1x6_1x3(unsigned int, const float *, size_t, size_t, float *, size_t);
40void cpp_fp32_1x4_1x5(unsigned int, const float *, size_t, size_t, float *, size_t);
41void cpp_fp32_1x2_1x7(unsigned int, const float *, size_t, size_t, float *, size_t);
ramelg01a1f78512022-06-29 16:28:10 +010042
43#define IMPL(KERN_ROWS, KERN_COLS, TRANS_ROWS, TRANS_COLS, KERN) \
44 new Transform<float>(#KERN, KERN_ROWS, KERN_COLS, TRANS_ROWS, TRANS_COLS, KERN)
45
46#define IMPL_T(KERN_ROWS, KERN_COLS, TRANS_ROWS, TRANS_COLS, KERN) \
47 new Transform<float>(#KERN, KERN_ROWS, KERN_COLS, TRANS_ROWS, TRANS_COLS, Transform<float>::get_transposed_kernel(KERN))
48
49static const TransformImplementation<float> transforms_fp32[] = {
50#if defined(__aarch64__)
51#if defined(ARM_COMPUTE_ENABLE_SVE)
52#endif // defined(ARM_COMPUTE_ENABLE_SVE)
53#endif // defined(__aarch64__)
54 { IMPL(3, 3, 6, 6, arm_fp32_4x4_3x3) },
55 { IMPL(3, 3, 4, 4, arm_fp32_2x2_3x3) },
56 { IMPL(5, 5, 6, 6, arm_fp32_2x2_5x5) },
57 { IMPL(1, 3, 1, 8, cpp_fp32_1x6_1x3) },
58 { IMPL_T(3, 1, 8, 1, cpp_fp32_1x6_1x3) },
59 { IMPL(1, 5, 1, 8, cpp_fp32_1x4_1x5) },
60 { IMPL_T(5, 1, 8, 1, cpp_fp32_1x4_1x5) },
61 { IMPL(1, 7, 1, 8, cpp_fp32_1x2_1x7) },
62 { IMPL_T(7, 1, 8, 1, cpp_fp32_1x2_1x7) },
63 { nullptr }
64};
65
66template <>
67const TransformImplementation<float> *implementation_list(void)
68{
69 return transforms_fp32;
70}
71
72} // namespace weight_transform
73} // namespace winograd
74} // namespace arm_conv