Manuel Bottini | 327225d | 2021-04-13 13:09:30 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017-2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
Georgios Pinitas | 2eb5d16 | 2021-07-02 09:01:49 +0100 | [diff] [blame] | 24 | #ifndef ARM_COMPUTE_CPU_DIRECT_CONV2D_KERNEL_H |
| 25 | #define ARM_COMPUTE_CPU_DIRECT_CONV2D_KERNEL_H |
Manuel Bottini | 327225d | 2021-04-13 13:09:30 +0100 | [diff] [blame] | 26 | |
| 27 | #include "src/core/common/Macros.h" |
Georgios Pinitas | 7891a73 | 2021-08-20 21:39:25 +0100 | [diff] [blame] | 28 | #include "src/cpu/ICpuKernel.h" |
Manuel Bottini | 327225d | 2021-04-13 13:09:30 +0100 | [diff] [blame] | 29 | |
| 30 | namespace arm_compute |
| 31 | { |
Manuel Bottini | 327225d | 2021-04-13 13:09:30 +0100 | [diff] [blame] | 32 | namespace cpu |
| 33 | { |
| 34 | namespace kernels |
| 35 | { |
| 36 | /** Interface for the kernel to perform Direct Convolution Layer. */ |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 37 | class CpuDirectConv2dKernel : public ICpuKernel |
Manuel Bottini | 327225d | 2021-04-13 13:09:30 +0100 | [diff] [blame] | 38 | { |
| 39 | public: |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 40 | CpuDirectConv2dKernel() = default; |
| 41 | ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuDirectConv2dKernel); |
| 42 | /** Set the src, weights, and dst tensors. |
Manuel Bottini | 327225d | 2021-04-13 13:09:30 +0100 | [diff] [blame] | 43 | * |
| 44 | * @note: DirectConvolution only works in the following configurations: |
| 45 | * 1x1 convolution with stride_x = 1/2/3, stride_y = 1/2/3 |
| 46 | * 3x3 convolution with stride_x = 1/2/3, stride_y = 1/2/3 |
| 47 | * |
| 48 | * @param[in] src The input tensor to convolve. 3 lower dimensions represent a single input [width, height, IFM], |
| 49 | * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: F16/F32. |
| 50 | * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. |
| 51 | * The 3rd dimension must be the same as the input's volume 3rd dimension. |
| 52 | * Data type supported:Same as @p input. |
| 53 | * @param[out] dst Output tensor. |
| 54 | * The 3rd dimensions must be equal to the 4th dimension of the @p kernels tensor. Data types supported: F16/F32 |
| 55 | * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. |
| 56 | */ |
| 57 | void configure(ITensorInfo *src, ITensorInfo *weights, ITensorInfo *dst, const PadStrideInfo &conv_info); |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 58 | /** Static function to check if given info will lead to a valid configuration |
Manuel Bottini | 327225d | 2021-04-13 13:09:30 +0100 | [diff] [blame] | 59 | * |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 60 | * Similar to CpuDirectConv2dKernel::configure() |
Manuel Bottini | 327225d | 2021-04-13 13:09:30 +0100 | [diff] [blame] | 61 | * |
| 62 | * @return a status |
| 63 | */ |
| 64 | static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *dst, const PadStrideInfo &conv_info); |
| 65 | |
| 66 | // Inherited methods overridden: |
| 67 | void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override; |
| 68 | const char *name() const override; |
| 69 | BorderSize border_size() const override; |
| 70 | |
| 71 | private: |
| 72 | /* Template function for optimized convolution NHWC */ |
| 73 | template <typename T> |
| 74 | void convolve_nhwc_optimized(const Window &window, const ITensor *src, const ITensor *weights, ITensor *dst); |
| 75 | |
| 76 | /* Template function for convolution NHWC */ |
| 77 | template <typename T> |
| 78 | void convolve_nhwc(const Window &window, const ITensor *src, const ITensor *weights, ITensor *dst); |
| 79 | |
| 80 | PadStrideInfo _conv_info{}; |
| 81 | BorderSize _border_size{}; |
| 82 | unsigned int _kernel_size{ 0 }; |
| 83 | unsigned int _num_weight_elems_read_per_row{ 0 }; |
| 84 | unsigned int _num_elems_read_per_iteration{ 0 }; |
| 85 | unsigned int _num_elems_written_per_iteration{ 0 }; |
| 86 | DataLayout _data_layout{ DataLayout::UNKNOWN }; |
| 87 | }; |
| 88 | } // namespace kernels |
| 89 | } // namespace cpu |
| 90 | } // namespace arm_compute |
Manuel Bottini | b4bb6a0 | 2021-05-24 16:01:32 +0100 | [diff] [blame] | 91 | #endif /*ARM_COMPUTE_CPU_DIRECTCONV2D_KERNEL_H */ |