commit 3c673949b4ed3ab3129859b18439ed8fe87a6ad1
author Mike Kelly <mike.kelly@arm.com> Thu Jul 25 09:26:06 2019 +0100
committer Mike Kelly <mike.kelly@arm.com> Thu Jul 25 09:26:06 2019 +0100
tree 0c5a47c6dbf9d03e7cdfdf10c72b8d3696bea59b
parent 29404fb3b16b301d630f492a2b89b9eb39b67e63

IVGCVSW-3521 CpuAcc V1.2 pad Failures

 * Fixed Pad and PadV2 failures and skips.
 * Templated ConvertPad to enable float16 tests to run.

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I50ded84fe44ea5d5949e877f383f32adff88680d

Utils.cpp

diff --git a/Utils.cpp b/Utils.cpp
index d3d62a0..43b65ee 100644
--- a/Utils.cpp
+++ b/Utils.cpp
@@ -7,6 +7,7 @@
 
 #include "Utils.hpp"
 
+#include <Half.hpp>
 #include <Permute.hpp>
 
 #include <cassert>
@@ -42,6 +43,9 @@
 
     switch(tensor.GetDataType())
     {
+    case armnn::DataType::Float16:
+        SwizzleAndroidNn4dTensorToArmNn<armnn::Half>(tensor.GetShape(), input, output, mappings);
+        break;
     case armnn::DataType::Float32:
         SwizzleAndroidNn4dTensorToArmNn<float>(tensor.GetShape(), input, output, mappings);
         break;
@@ -112,6 +116,9 @@
         case V1_2::OperandType::TENSOR_FLOAT32:
             type = armnn::DataType::Float32;
             break;
+        case V1_2::OperandType::TENSOR_FLOAT16:
+            type = armnn::DataType::Float16;
+            break;
         case V1_2::OperandType::TENSOR_QUANT8_ASYMM:
             type = armnn::DataType::QuantisedAsymm8;
             break;