commit 51ba2c6e0f83d2891a92c63fc30001de761e0789
author Sadik Armagan <sadik.armagan@arm.com> Tue Mar 31 15:36:25 2020 +0100
committer Sadik Armagan <sadik.armagan@arm.com> Tue Mar 31 15:36:25 2020 +0100
tree db11303d0f2cda397ee9eda1361b0c1622d216a4
parent a984702d6e44708eb7b2dbc678d47faf04769c67

IVGCVSW-4407 HAL 1.3 Operators Support

* IVGCVSW-4441 Add Support for ANEURALNETWORKS_ELU
* IVGCVSW-4443 Add Support for ANEURALNETWORKS_HARD_SWISH
* IVGCVSW-4448 Add TENSOR_QUANT8_ASYMM_SIGNED data type support

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Idb9bb3f463b956221711423c15b6557eeb1af7db

ConversionUtils.hpp

diff --git a/ConversionUtils.hpp b/ConversionUtils.hpp
index 315089c..8067e53 100644
--- a/ConversionUtils.hpp
+++ b/ConversionUtils.hpp
@@ -207,9 +207,11 @@
 inline bool IsOperandTypeSupportedForTensors(V1_3::OperandType type)
 {
     return type == V1_3::OperandType::BOOL                           ||
+           type == V1_3::OperandType::TENSOR_BOOL8                   ||
            type == V1_3::OperandType::TENSOR_FLOAT16                 ||
            type == V1_3::OperandType::TENSOR_FLOAT32                 ||
            type == V1_3::OperandType::TENSOR_QUANT8_ASYMM            ||
+           type == V1_3::OperandType::TENSOR_QUANT8_ASYMM_SIGNED     ||
            type == V1_3::OperandType::TENSOR_QUANT8_SYMM             ||
            type == V1_3::OperandType::TENSOR_QUANT8_SYMM_PER_CHANNEL ||
            type == V1_3::OperandType::TENSOR_QUANT16_SYMM            ||