commit 912b36224f19952663ebd3edc2a69d9031662fd1
author Matthew Bentham <matthew.bentham@arm.com> Fri May 03 15:49:14 2019 +0100
committer Matteo Martincigh <matteo.martincigh@arm.com> Tue May 07 07:54:08 2019 +0000
tree b84bdf384a6a9866336cfe5db7a613a4fc96d03c
parent 856d1c9c9b0b1609282c4f797cbafefc6531240d

IVGCVSW-2911 Work towards compatibility with Q

Explicitly use HAL V1_0 Operand, OperandType, and IPreparedModelCallback

Change-Id: If6aa6e9dc1bd0b7673ec247ac3560e7f072ef699
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>

Utils.cpp

diff --git a/Utils.cpp b/Utils.cpp
index cd9e1b4..f5599f7 100644
--- a/Utils.cpp
+++ b/Utils.cpp
@@ -74,19 +74,19 @@
     return memory;
 }
 
-armnn::TensorInfo GetTensorInfoForOperand(const Operand& operand)
+armnn::TensorInfo GetTensorInfoForOperand(const V1_0::Operand& operand)
 {
     armnn::DataType type;
 
     switch (operand.type)
     {
-        case OperandType::TENSOR_FLOAT32:
+        case V1_0::OperandType::TENSOR_FLOAT32:
             type = armnn::DataType::Float32;
             break;
-        case OperandType::TENSOR_QUANT8_ASYMM:
+        case V1_0::OperandType::TENSOR_QUANT8_ASYMM:
             type = armnn::DataType::QuantisedAsymm8;
             break;
-        case OperandType::TENSOR_INT32:
+        case V1_0::OperandType::TENSOR_INT32:
             type = armnn::DataType::Signed32;
             break;
         default:
@@ -101,7 +101,7 @@
     return ret;
 }
 
-std::string GetOperandSummary(const Operand& operand)
+std::string GetOperandSummary(const V1_0::Operand& operand)
 {
     return android::hardware::details::arrayToString(operand.dimensions, operand.dimensions.size()) + " " +
         toString(operand.type);