surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | 93e4898 | 2018-09-05 13:05:09 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 4 | // |
| 5 | #include "DriverTestHelpers.hpp" |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 6 | |
| 7 | #include "../1.0/HalPolicy.hpp" |
| 8 | |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 9 | #include <doctest/doctest.h> |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 10 | |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 11 | #include <log/log.h> |
| 12 | |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 13 | TEST_SUITE("GenericLayerTests") |
| 14 | { |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 15 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 16 | using namespace android::hardware; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 17 | using namespace driverTestHelpers; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 18 | using namespace armnn_driver; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 19 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 20 | using HalPolicy = hal_1_0::HalPolicy; |
| 21 | |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 22 | TEST_CASE("GetSupportedOperations") |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 23 | { |
| 24 | auto driver = std::make_unique<ArmnnDriver>(DriverOptions(armnn::Compute::CpuRef)); |
| 25 | |
Kevin May | ec1e5b8 | 2020-02-26 17:00:39 +0000 | [diff] [blame] | 26 | V1_0::ErrorStatus errorStatus; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 27 | std::vector<bool> supported; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 28 | |
Kevin May | ec1e5b8 | 2020-02-26 17:00:39 +0000 | [diff] [blame] | 29 | auto cb = [&](V1_0::ErrorStatus _errorStatus, const std::vector<bool>& _supported) |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 30 | { |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 31 | errorStatus = _errorStatus; |
| 32 | supported = _supported; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 33 | }; |
| 34 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 35 | HalPolicy::Model model0 = {}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 36 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 37 | // Add operands |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 38 | int32_t actValue = 0; |
| 39 | float weightValue[] = {2, 4, 1}; |
| 40 | float biasValue[] = {4}; |
| 41 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 42 | AddInputOperand<HalPolicy>(model0, hidl_vec<uint32_t>{1, 3}); |
| 43 | AddTensorOperand<HalPolicy>(model0, hidl_vec<uint32_t>{1, 3}, weightValue); |
| 44 | AddTensorOperand<HalPolicy>(model0, hidl_vec<uint32_t>{1}, biasValue); |
| 45 | AddIntOperand<HalPolicy>(model0, actValue); |
| 46 | AddOutputOperand<HalPolicy>(model0, hidl_vec<uint32_t>{1, 1}); |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 47 | |
| 48 | model0.operations.resize(1); |
| 49 | |
| 50 | // Make a correct fully connected operation |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 51 | model0.operations[0].type = HalPolicy::OperationType::FULLY_CONNECTED; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 52 | model0.operations[0].inputs = hidl_vec<uint32_t>{0, 1, 2, 3}; |
| 53 | model0.operations[0].outputs = hidl_vec<uint32_t>{4}; |
| 54 | |
| 55 | driver->getSupportedOperations(model0, cb); |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 56 | CHECK((int)errorStatus == (int)V1_0::ErrorStatus::NONE); |
| 57 | CHECK(supported.size() == (size_t)1); |
| 58 | CHECK(supported[0] == true); |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 59 | |
Matteo Martincigh | 8b287c2 | 2018-09-07 09:25:10 +0100 | [diff] [blame] | 60 | V1_0::Model model1 = {}; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 61 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 62 | AddInputOperand<HalPolicy>(model1, hidl_vec<uint32_t>{1, 3}); |
| 63 | AddTensorOperand<HalPolicy>(model1, hidl_vec<uint32_t>{1, 3}, weightValue); |
| 64 | AddTensorOperand<HalPolicy>(model1, hidl_vec<uint32_t>{1}, biasValue); |
| 65 | AddIntOperand<HalPolicy>(model1, actValue); |
| 66 | AddOutputOperand<HalPolicy>(model1, hidl_vec<uint32_t>{1, 1}); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 67 | |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 68 | model1.operations.resize(2); |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 69 | |
| 70 | // Make a correct fully connected operation |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 71 | model1.operations[0].type = HalPolicy::OperationType::FULLY_CONNECTED; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 72 | model1.operations[0].inputs = hidl_vec<uint32_t>{0, 1, 2, 3}; |
| 73 | model1.operations[0].outputs = hidl_vec<uint32_t>{4}; |
| 74 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 75 | // Add an incorrect fully connected operation |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 76 | AddIntOperand<HalPolicy>(model1, actValue); |
| 77 | AddOutputOperand<HalPolicy>(model1, hidl_vec<uint32_t>{1, 1}); |
| 78 | |
| 79 | model1.operations[1].type = HalPolicy::OperationType::FULLY_CONNECTED; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 80 | model1.operations[1].inputs = hidl_vec<uint32_t>{4}; // Only 1 input operand, expected 4 |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 81 | model1.operations[1].outputs = hidl_vec<uint32_t>{5}; |
| 82 | |
| 83 | driver->getSupportedOperations(model1, cb); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 84 | |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 85 | CHECK((int)errorStatus == (int)V1_0::ErrorStatus::INVALID_ARGUMENT); |
| 86 | CHECK(supported.empty()); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 87 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 88 | // Test Broadcast on add/mul operators |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 89 | HalPolicy::Model model2 = {}; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 90 | |
David Monahan | c60d0fd | 2020-05-19 14:58:34 +0100 | [diff] [blame] | 91 | AddInputOperand<HalPolicy>(model2, |
| 92 | hidl_vec<uint32_t>{1, 1, 3, 4}, |
| 93 | HalPolicy::OperandType::TENSOR_FLOAT32, |
| 94 | 0.0f, |
| 95 | 0, |
| 96 | 2); |
| 97 | AddInputOperand<HalPolicy>(model2, |
| 98 | hidl_vec<uint32_t>{4}, |
| 99 | HalPolicy::OperandType::TENSOR_FLOAT32, |
| 100 | 0.0f, |
| 101 | 0, |
| 102 | 2); |
| 103 | AddIntOperand<HalPolicy>(model2, actValue, 2); |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 104 | AddOutputOperand<HalPolicy>(model2, hidl_vec<uint32_t>{1, 1, 3, 4}); |
| 105 | AddOutputOperand<HalPolicy>(model2, hidl_vec<uint32_t>{1, 1, 3, 4}); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 106 | |
| 107 | model2.operations.resize(2); |
| 108 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 109 | model2.operations[0].type = HalPolicy::OperationType::ADD; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 110 | model2.operations[0].inputs = hidl_vec<uint32_t>{0, 1, 2}; |
| 111 | model2.operations[0].outputs = hidl_vec<uint32_t>{3}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 112 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 113 | model2.operations[1].type = HalPolicy::OperationType::MUL; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 114 | model2.operations[1].inputs = hidl_vec<uint32_t>{0, 1, 2}; |
| 115 | model2.operations[1].outputs = hidl_vec<uint32_t>{4}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 116 | |
| 117 | driver->getSupportedOperations(model2, cb); |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 118 | CHECK((int)errorStatus == (int)V1_0::ErrorStatus::NONE); |
| 119 | CHECK(supported.size() == (size_t)2); |
| 120 | CHECK(supported[0] == true); |
| 121 | CHECK(supported[1] == true); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 122 | |
Matteo Martincigh | 8b287c2 | 2018-09-07 09:25:10 +0100 | [diff] [blame] | 123 | V1_0::Model model3 = {}; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 124 | |
Aron Virginas-Tar | 8edb16d | 2019-10-01 13:34:59 +0100 | [diff] [blame] | 125 | AddInputOperand<HalPolicy>(model3, |
| 126 | hidl_vec<uint32_t>{1, 1, 3, 4}, |
| 127 | HalPolicy::OperandType::TENSOR_INT32); |
| 128 | AddInputOperand<HalPolicy>(model3, |
| 129 | hidl_vec<uint32_t>{4}, |
| 130 | HalPolicy::OperandType::TENSOR_INT32); |
| 131 | AddInputOperand<HalPolicy>(model3, hidl_vec<uint32_t>{1, 1, 3, 4}); |
| 132 | |
| 133 | AddOutputOperand<HalPolicy>(model3, hidl_vec<uint32_t>{1, 1, 3, 4}); |
| 134 | AddOutputOperand<HalPolicy>(model3, |
| 135 | hidl_vec<uint32_t>{1, 1, 3, 4}, |
| 136 | HalPolicy::OperandType::TENSOR_QUANT8_ASYMM, |
| 137 | 1.f / 225.f); |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 138 | |
| 139 | model3.operations.resize(1); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 140 | |
| 141 | // Add unsupported operation, should return no error but we don't support it |
Aron Virginas-Tar | 8edb16d | 2019-10-01 13:34:59 +0100 | [diff] [blame] | 142 | model3.operations[0].type = HalPolicy::OperationType::HASHTABLE_LOOKUP; |
| 143 | model3.operations[0].inputs = hidl_vec<uint32_t>{0, 1, 2}; |
| 144 | model3.operations[0].outputs = hidl_vec<uint32_t>{3, 4}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 145 | |
| 146 | driver->getSupportedOperations(model3, cb); |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 147 | CHECK((int)errorStatus == (int)V1_0::ErrorStatus::NONE); |
| 148 | CHECK(supported.size() == (size_t)1); |
| 149 | CHECK(supported[0] == false); |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 150 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 151 | HalPolicy::Model model4 = {}; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 152 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 153 | AddIntOperand<HalPolicy>(model4, 0); |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 154 | |
| 155 | model4.operations.resize(1); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 156 | |
| 157 | // Add invalid operation |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 158 | model4.operations[0].type = static_cast<HalPolicy::OperationType>(100); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 159 | model4.operations[0].outputs = hidl_vec<uint32_t>{0}; |
| 160 | |
| 161 | driver->getSupportedOperations(model4, cb); |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 162 | CHECK((int)errorStatus == (int)V1_0::ErrorStatus::INVALID_ARGUMENT); |
| 163 | CHECK(supported.empty()); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 164 | } |
| 165 | |
| 166 | // The purpose of this test is to ensure that when encountering an unsupported operation |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 167 | // it is skipped and getSupportedOperations() continues (rather than failing and stopping). |
| 168 | // As per IVGCVSW-710. |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 169 | TEST_CASE("UnsupportedLayerContinueOnFailure") |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 170 | { |
| 171 | auto driver = std::make_unique<ArmnnDriver>(DriverOptions(armnn::Compute::CpuRef)); |
| 172 | |
Kevin May | ec1e5b8 | 2020-02-26 17:00:39 +0000 | [diff] [blame] | 173 | V1_0::ErrorStatus errorStatus; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 174 | std::vector<bool> supported; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 175 | |
Kevin May | ec1e5b8 | 2020-02-26 17:00:39 +0000 | [diff] [blame] | 176 | auto cb = [&](V1_0::ErrorStatus _errorStatus, const std::vector<bool>& _supported) |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 177 | { |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 178 | errorStatus = _errorStatus; |
| 179 | supported = _supported; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 180 | }; |
| 181 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 182 | HalPolicy::Model model = {}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 183 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 184 | // Operands |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 185 | int32_t actValue = 0; |
| 186 | float weightValue[] = {2, 4, 1}; |
| 187 | float biasValue[] = {4}; |
| 188 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 189 | // HASHTABLE_LOOKUP is unsupported at the time of writing this test, but any unsupported layer will do |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 190 | AddInputOperand<HalPolicy>(model, |
| 191 | hidl_vec<uint32_t>{1, 1, 3, 4}, |
| 192 | HalPolicy::OperandType::TENSOR_INT32); |
| 193 | AddInputOperand<HalPolicy>(model, |
| 194 | hidl_vec<uint32_t>{4}, |
David Monahan | c60d0fd | 2020-05-19 14:58:34 +0100 | [diff] [blame] | 195 | HalPolicy::OperandType::TENSOR_INT32, |
| 196 | 0.0f, |
| 197 | 0, |
| 198 | 2); |
| 199 | AddInputOperand<HalPolicy>(model, |
| 200 | hidl_vec<uint32_t>{1, 1, 3, 4}, |
| 201 | HalPolicy::OperandType::TENSOR_FLOAT32, |
| 202 | 0.0f, |
| 203 | 0, |
| 204 | 2); |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 205 | |
| 206 | AddOutputOperand<HalPolicy>(model, hidl_vec<uint32_t>{1, 1, 3, 4}); |
| 207 | AddOutputOperand<HalPolicy>(model, |
| 208 | hidl_vec<uint32_t>{1, 1, 3, 4}, |
Ellen Norris-Thompson | 976ad3e | 2019-08-21 15:21:14 +0100 | [diff] [blame] | 209 | HalPolicy::OperandType::TENSOR_QUANT8_ASYMM, |
| 210 | 1.f / 225.f); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 211 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 212 | // Fully connected is supported |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 213 | AddInputOperand<HalPolicy>(model, hidl_vec<uint32_t>{1, 3}); |
| 214 | |
| 215 | AddTensorOperand<HalPolicy>(model, hidl_vec<uint32_t>{1, 3}, weightValue); |
| 216 | AddTensorOperand<HalPolicy>(model, hidl_vec<uint32_t>{1}, biasValue); |
| 217 | |
| 218 | AddIntOperand<HalPolicy>(model, actValue); |
| 219 | |
| 220 | AddOutputOperand<HalPolicy>(model, hidl_vec<uint32_t>{1, 1}); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 221 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 222 | // EMBEDDING_LOOKUP is unsupported |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 223 | AddOutputOperand<HalPolicy>(model, hidl_vec<uint32_t>{1, 1, 3, 4}); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 224 | |
| 225 | model.operations.resize(3); |
| 226 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 227 | // Unsupported |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 228 | model.operations[0].type = HalPolicy::OperationType::HASHTABLE_LOOKUP; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 229 | model.operations[0].inputs = hidl_vec<uint32_t>{0, 1, 2}; |
| 230 | model.operations[0].outputs = hidl_vec<uint32_t>{3, 4}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 231 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 232 | // Supported |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 233 | model.operations[1].type = HalPolicy::OperationType::FULLY_CONNECTED; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 234 | model.operations[1].inputs = hidl_vec<uint32_t>{5, 6, 7, 8}; |
| 235 | model.operations[1].outputs = hidl_vec<uint32_t>{9}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 236 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 237 | // Unsupported |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 238 | model.operations[2].type = HalPolicy::OperationType::EMBEDDING_LOOKUP; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 239 | model.operations[2].inputs = hidl_vec<uint32_t>{1, 2}; |
| 240 | model.operations[2].outputs = hidl_vec<uint32_t>{10}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 241 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 242 | // We are testing that the unsupported layers return false and the test continues rather than failing and stopping |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 243 | driver->getSupportedOperations(model, cb); |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 244 | CHECK((int)errorStatus == (int)V1_0::ErrorStatus::NONE); |
| 245 | CHECK(supported.size() == (size_t)3); |
| 246 | CHECK(supported[0] == false); |
| 247 | CHECK(supported[1] == true); |
| 248 | CHECK(supported[2] == false); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | // The purpose of this test is to ensure that when encountering an failure |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 252 | // during mem pool mapping we properly report an error to the framework via a callback |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 253 | TEST_CASE("ModelToINetworkConverterMemPoolFail") |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 254 | { |
Nikhil Raj | 7760582 | 2018-09-03 11:25:56 +0100 | [diff] [blame] | 255 | auto driver = std::make_unique<ArmnnDriver>(DriverOptions(armnn::Compute::CpuRef)); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 256 | |
Kevin May | ec1e5b8 | 2020-02-26 17:00:39 +0000 | [diff] [blame] | 257 | V1_0::ErrorStatus errorStatus; |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 258 | std::vector<bool> supported; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 259 | |
Kevin May | ec1e5b8 | 2020-02-26 17:00:39 +0000 | [diff] [blame] | 260 | auto cb = [&](V1_0::ErrorStatus _errorStatus, const std::vector<bool>& _supported) |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 261 | { |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 262 | errorStatus = _errorStatus; |
| 263 | supported = _supported; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 264 | }; |
| 265 | |
Aron Virginas-Tar | 44cfd84 | 2019-06-14 15:45:03 +0100 | [diff] [blame] | 266 | HalPolicy::Model model = {}; |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 267 | |
| 268 | model.pools = hidl_vec<hidl_memory>{hidl_memory("Unsuported hidl memory type", nullptr, 0)}; |
| 269 | |
telsoa01 | ce3e84a | 2018-08-31 09:31:35 +0100 | [diff] [blame] | 270 | // Memory pool mapping should fail, we should report an error |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 271 | driver->getSupportedOperations(model, cb); |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 272 | CHECK((int)errorStatus != (int)V1_0::ErrorStatus::NONE); |
| 273 | CHECK(supported.empty()); |
surmeh01 | 49b9e10 | 2018-05-17 14:11:25 +0100 | [diff] [blame] | 274 | } |
| 275 | |
Sadik Armagan | 9150bff | 2021-05-26 15:40:53 +0100 | [diff] [blame^] | 276 | } |