IVGCVSW-3521 CpuAcc V1.2 pad Failures
* Pad value for QASYMM8 is no longer stored in quantized form.
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I048e1d233353c0560ae03a7cc1ed5199295352bc
diff --git a/src/backends/aclCommon/ArmComputeTensorUtils.hpp b/src/backends/aclCommon/ArmComputeTensorUtils.hpp
index fa455b7..c9587a7 100644
--- a/src/backends/aclCommon/ArmComputeTensorUtils.hpp
+++ b/src/backends/aclCommon/ArmComputeTensorUtils.hpp
@@ -12,6 +12,8 @@
#include <arm_compute/core/Types.h>
#include <arm_compute/core/Size2D.h>
+#include <Half.hpp>
+
#include <boost/cast.hpp>
namespace armnn
@@ -58,6 +60,9 @@
/// Utility function used to setup an arm_compute::Size2D object from width and height values.
arm_compute::Size2D BuildArmComputeSize2D(const unsigned int width, const unsigned int height);
+/// Gets the appropriate PixelValue for the input DataType
+arm_compute::PixelValue GetPixelValue(arm_compute::ITensor& input, float pixelValue);
+
/// Utility function used to setup an arm_compute::PadStrideInfo object from an armnn layer descriptor.
template <typename Descriptor>
arm_compute::PadStrideInfo BuildArmComputePadStrideInfo(const Descriptor &descriptor)