IVGCVSW-1843 : refactor ClAdditionWorkload and ClSubtractionWorkload
Change-Id: I0ca9f16217f8e32bb57a49b841611f10dabf021a
diff --git a/Android.mk b/Android.mk
index 9c4db74..6f7771c 100644
--- a/Android.mk
+++ b/Android.mk
@@ -45,12 +45,8 @@
src/armnn/backends/ArmComputeTensorUtils.cpp \
src/armnn/backends/ClWorkloads/ClActivationFloatWorkload.cpp \
src/armnn/backends/ClWorkloads/ClActivationUint8Workload.cpp \
- src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.cpp \
- src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.cpp \
- src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.cpp \
- src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.cpp \
- src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.cpp \
- src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.cpp \
+ src/armnn/backends/ClWorkloads/ClAdditionWorkload.cpp \
+ src/armnn/backends/ClWorkloads/ClSubtractionWorkload.cpp \
src/armnn/backends/ClWorkloads/ClBaseConstantWorkload.cpp \
src/armnn/backends/ClWorkloads/ClBatchNormalizationFloatWorkload.cpp \
src/armnn/backends/ClWorkloads/ClConstantFloatWorkload.cpp \
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 9c2685c..d166a71 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -483,18 +483,10 @@
src/armnn/backends/ClWorkloads/ClActivationFloatWorkload.hpp
src/armnn/backends/ClWorkloads/ClActivationUint8Workload.cpp
src/armnn/backends/ClWorkloads/ClActivationUint8Workload.hpp
- src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.cpp
- src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.hpp
- src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.cpp
- src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.hpp
- src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.cpp
- src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.hpp
- src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.cpp
- src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.hpp
- src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.cpp
- src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.hpp
- src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.cpp
- src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.hpp
+ src/armnn/backends/ClWorkloads/ClAdditionWorkload.cpp
+ src/armnn/backends/ClWorkloads/ClAdditionWorkload.hpp
+ src/armnn/backends/ClWorkloads/ClSubtractionWorkload.cpp
+ src/armnn/backends/ClWorkloads/ClSubtractionWorkload.hpp
src/armnn/backends/ClWorkloads/ClConvertFp16ToFp32Workload.cpp
src/armnn/backends/ClWorkloads/ClConvertFp16ToFp32Workload.hpp
src/armnn/backends/ClWorkloads/ClConvertFp32ToFp16Workload.cpp
diff --git a/src/armnn/backends/ClLayerSupport.cpp b/src/armnn/backends/ClLayerSupport.cpp
index 3dba1ec..aeb2759 100644
--- a/src/armnn/backends/ClLayerSupport.cpp
+++ b/src/armnn/backends/ClLayerSupport.cpp
@@ -14,7 +14,7 @@
#include <boost/core/ignore_unused.hpp>
#ifdef ARMCOMPUTECL_ENABLED
-#include "ClWorkloads/ClAdditionFloatWorkload.hpp"
+#include "ClWorkloads/ClAdditionWorkload.hpp"
#include "ClWorkloads/ClActivationFloatWorkload.hpp"
#include "ClWorkloads/ClBatchNormalizationFloatWorkload.hpp"
#include "ClWorkloads/ClConvertFp16ToFp32Workload.hpp"
@@ -29,7 +29,7 @@
#include "ClWorkloads/ClPermuteWorkload.hpp"
#include "ClWorkloads/ClNormalizationFloatWorkload.hpp"
#include "ClWorkloads/ClSoftmaxBaseWorkload.hpp"
-#include "ClWorkloads/ClSubtractionFloatWorkload.hpp"
+#include "ClWorkloads/ClSubtractionWorkload.hpp"
#include "ClWorkloads/ClLstmFloatWorkload.hpp"
#endif
diff --git a/src/armnn/backends/ClWorkloadFactory.cpp b/src/armnn/backends/ClWorkloadFactory.cpp
index 056a201..217c637 100644
--- a/src/armnn/backends/ClWorkloadFactory.cpp
+++ b/src/armnn/backends/ClWorkloadFactory.cpp
@@ -154,7 +154,8 @@
std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreateAddition(const AdditionQueueDescriptor& descriptor,
const WorkloadInfo& info) const
{
- return MakeWorkload<ClAdditionFloatWorkload, ClAdditionUint8Workload>(descriptor, info);
+ return MakeWorkload<ClAdditionWorkload<armnn::DataType::Float16, armnn::DataType::Float32>,
+ ClAdditionWorkload<armnn::DataType::QuantisedAsymm8>>(descriptor, info);
}
std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreateMultiplication(
@@ -172,7 +173,8 @@
std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreateSubtraction(const SubtractionQueueDescriptor& descriptor,
const WorkloadInfo& info) const
{
- return MakeWorkload<ClSubtractionFloatWorkload, ClSubtractionUint8Workload>(descriptor, info);
+ return MakeWorkload<ClSubtractionWorkload<armnn::DataType::Float16, armnn::DataType::Float32>,
+ ClSubtractionWorkload<armnn::DataType::QuantisedAsymm8>>(descriptor, info);
}
std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreateBatchNormalization(
diff --git a/src/armnn/backends/ClWorkloads.hpp b/src/armnn/backends/ClWorkloads.hpp
index 0800401..3472bca 100644
--- a/src/armnn/backends/ClWorkloads.hpp
+++ b/src/armnn/backends/ClWorkloads.hpp
@@ -6,8 +6,7 @@
#pragma once
#include "backends/ClWorkloads/ClActivationFloatWorkload.hpp"
#include "backends/ClWorkloads/ClActivationUint8Workload.hpp"
-#include "backends/ClWorkloads/ClAdditionFloatWorkload.hpp"
-#include "backends/ClWorkloads/ClAdditionUint8Workload.hpp"
+#include "backends/ClWorkloads/ClAdditionWorkload.hpp"
#include "backends/ClWorkloads/ClBaseConstantWorkload.hpp"
#include "backends/ClWorkloads/ClBaseMergerWorkload.hpp"
#include "backends/ClWorkloads/ClBatchNormalizationFloatWorkload.hpp"
@@ -36,7 +35,6 @@
#include "backends/ClWorkloads/ClSoftmaxUint8Workload.hpp"
#include "backends/ClWorkloads/ClSplitterFloatWorkload.hpp"
#include "backends/ClWorkloads/ClSplitterUint8Workload.hpp"
-#include "backends/ClWorkloads/ClSubtractionFloatWorkload.hpp"
-#include "backends/ClWorkloads/ClSubtractionUint8Workload.hpp"
+#include "backends/ClWorkloads/ClSubtractionWorkload.hpp"
#include "backends/ClWorkloads/ClConvertFp16ToFp32Workload.hpp"
#include "backends/ClWorkloads/ClConvertFp32ToFp16Workload.hpp"
diff --git a/src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.cpp b/src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.cpp
deleted file mode 100644
index b51d8a7..0000000
--- a/src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.cpp
+++ /dev/null
@@ -1,22 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#include "ClAdditionFloatWorkload.hpp"
-
-#include "backends/ClTensorHandle.hpp"
-#include "backends/CpuTensorHandle.hpp"
-#include "backends/ArmComputeTensorUtils.hpp"
-
-namespace armnn
-{
-using namespace armcomputetensorutils;
-
-void ClAdditionFloatWorkload::Execute() const
-{
- ARMNN_SCOPED_PROFILING_EVENT_CL("ClAdditionFloatWorkload_Execute");
- ClAdditionBaseWorkload::Execute();
-}
-
-} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.hpp b/src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.hpp
deleted file mode 100644
index de33ca6..0000000
--- a/src/armnn/backends/ClWorkloads/ClAdditionFloatWorkload.hpp
+++ /dev/null
@@ -1,20 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#pragma once
-
-#include "ClAdditionBaseWorkload.hpp"
-
-namespace armnn
-{
-
-class ClAdditionFloatWorkload : public ClAdditionBaseWorkload<DataType::Float16, DataType::Float32>
-{
-public:
- using ClAdditionBaseWorkload<DataType::Float16, DataType::Float32>::ClAdditionBaseWorkload;
- void Execute() const override;
-};
-
-} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.cpp b/src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.cpp
deleted file mode 100644
index 57b9062..0000000
--- a/src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.cpp
+++ /dev/null
@@ -1,18 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#include "ClAdditionUint8Workload.hpp"
-
-namespace armnn
-{
-using namespace armcomputetensorutils;
-
-void ClAdditionUint8Workload::Execute() const
-{
- ARMNN_SCOPED_PROFILING_EVENT_CL("ClAdditionUint8Workload_Execute");
- ClAdditionBaseWorkload::Execute();
-}
-
-} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.hpp b/src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.hpp
deleted file mode 100644
index d127e7e..0000000
--- a/src/armnn/backends/ClWorkloads/ClAdditionUint8Workload.hpp
+++ /dev/null
@@ -1,20 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#pragma once
-
-#include "ClAdditionBaseWorkload.hpp"
-
-namespace armnn
-{
-
-class ClAdditionUint8Workload : public ClAdditionBaseWorkload<DataType::QuantisedAsymm8>
-{
-public:
- using ClAdditionBaseWorkload<DataType::QuantisedAsymm8>::ClAdditionBaseWorkload;
- void Execute() const override;
-};
-
-} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.cpp b/src/armnn/backends/ClWorkloads/ClAdditionWorkload.cpp
similarity index 80%
rename from src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.cpp
rename to src/armnn/backends/ClWorkloads/ClAdditionWorkload.cpp
index eb14aa3..0bba327 100644
--- a/src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.cpp
+++ b/src/armnn/backends/ClWorkloads/ClAdditionWorkload.cpp
@@ -3,7 +3,7 @@
// SPDX-License-Identifier: MIT
//
-#include "ClAdditionBaseWorkload.hpp"
+#include "ClAdditionWorkload.hpp"
#include "backends/ClTensorHandle.hpp"
#include "backends/CpuTensorHandle.hpp"
@@ -16,11 +16,11 @@
static constexpr arm_compute::ConvertPolicy g_AclConvertPolicy = arm_compute::ConvertPolicy::SATURATE;
template <armnn::DataType... T>
-ClAdditionBaseWorkload<T...>::ClAdditionBaseWorkload(const AdditionQueueDescriptor& descriptor,
+ClAdditionWorkload<T...>::ClAdditionWorkload(const AdditionQueueDescriptor& descriptor,
const WorkloadInfo& info)
: TypedWorkload<AdditionQueueDescriptor, T...>(descriptor, info)
{
- this->m_Data.ValidateInputsOutputs("ClAdditionBaseWorkload", 2, 1);
+ this->m_Data.ValidateInputsOutputs("ClAdditionWorkload", 2, 1);
arm_compute::ICLTensor& input0 = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[0])->GetTensor();
arm_compute::ICLTensor& input1 = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[1])->GetTensor();
@@ -29,9 +29,9 @@
}
template <armnn::DataType... T>
-void ClAdditionBaseWorkload<T...>::Execute() const
+void ClAdditionWorkload<T...>::Execute() const
{
- ARMNN_SCOPED_PROFILING_EVENT_CL("ClAdditionBaseWorkload_Execute");
+ ARMNN_SCOPED_PROFILING_EVENT_CL("ClAdditionWorkload_Execute");
m_Layer.run();
}
@@ -60,5 +60,5 @@
} //namespace armnn
-template class armnn::ClAdditionBaseWorkload<armnn::DataType::Float16, armnn::DataType::Float32>;
-template class armnn::ClAdditionBaseWorkload<armnn::DataType::QuantisedAsymm8>;
+template class armnn::ClAdditionWorkload<armnn::DataType::Float16, armnn::DataType::Float32>;
+template class armnn::ClAdditionWorkload<armnn::DataType::QuantisedAsymm8>;
diff --git a/src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.hpp b/src/armnn/backends/ClWorkloads/ClAdditionWorkload.hpp
similarity index 74%
rename from src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.hpp
rename to src/armnn/backends/ClWorkloads/ClAdditionWorkload.hpp
index b3bf1fe..8af8f23 100644
--- a/src/armnn/backends/ClWorkloads/ClAdditionBaseWorkload.hpp
+++ b/src/armnn/backends/ClWorkloads/ClAdditionWorkload.hpp
@@ -11,10 +11,10 @@
{
template <armnn::DataType... dataTypes>
-class ClAdditionBaseWorkload : public TypedWorkload<AdditionQueueDescriptor, dataTypes...>
+class ClAdditionWorkload : public TypedWorkload<AdditionQueueDescriptor, dataTypes...>
{
public:
- ClAdditionBaseWorkload(const AdditionQueueDescriptor& descriptor, const WorkloadInfo& info);
+ ClAdditionWorkload(const AdditionQueueDescriptor& descriptor, const WorkloadInfo& info);
void Execute() const override;
diff --git a/src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.cpp b/src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.cpp
deleted file mode 100644
index 3321e20..0000000
--- a/src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.cpp
+++ /dev/null
@@ -1,22 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#include "ClSubtractionFloatWorkload.hpp"
-
-#include "backends/ClTensorHandle.hpp"
-#include "backends/CpuTensorHandle.hpp"
-#include "backends/ArmComputeTensorUtils.hpp"
-
-namespace armnn
-{
-using namespace armcomputetensorutils;
-
-void ClSubtractionFloatWorkload::Execute() const
-{
- ARMNN_SCOPED_PROFILING_EVENT_CL("ClSubtractionFloatWorkload_Execute");
- ClSubtractionBaseWorkload::Execute();
-}
-
-} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.hpp b/src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.hpp
deleted file mode 100644
index 34a5e40..0000000
--- a/src/armnn/backends/ClWorkloads/ClSubtractionFloatWorkload.hpp
+++ /dev/null
@@ -1,20 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#pragma once
-
-#include "ClSubtractionBaseWorkload.hpp"
-
-namespace armnn
-{
-
-class ClSubtractionFloatWorkload : public ClSubtractionBaseWorkload<DataType::Float16, DataType::Float32>
-{
-public:
- using ClSubtractionBaseWorkload<DataType::Float16, DataType::Float32>::ClSubtractionBaseWorkload;
- void Execute() const override;
-};
-
-} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.cpp b/src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.cpp
deleted file mode 100644
index 966068d..0000000
--- a/src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.cpp
+++ /dev/null
@@ -1,18 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#include "ClSubtractionUint8Workload.hpp"
-
-namespace armnn
-{
-using namespace armcomputetensorutils;
-
-void ClSubtractionUint8Workload::Execute() const
-{
- ARMNN_SCOPED_PROFILING_EVENT_CL("ClSubtractionUint8Workload_Execute");
- ClSubtractionBaseWorkload::Execute();
-}
-
-} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.hpp b/src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.hpp
deleted file mode 100644
index 15b2059..0000000
--- a/src/armnn/backends/ClWorkloads/ClSubtractionUint8Workload.hpp
+++ /dev/null
@@ -1,20 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#pragma once
-
-#include "ClSubtractionBaseWorkload.hpp"
-
-namespace armnn
-{
-
-class ClSubtractionUint8Workload : public ClSubtractionBaseWorkload<DataType::QuantisedAsymm8>
-{
-public:
- using ClSubtractionBaseWorkload<DataType::QuantisedAsymm8>::ClSubtractionBaseWorkload;
- void Execute() const override;
-};
-
-} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.cpp b/src/armnn/backends/ClWorkloads/ClSubtractionWorkload.cpp
similarity index 80%
rename from src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.cpp
rename to src/armnn/backends/ClWorkloads/ClSubtractionWorkload.cpp
index 2145ed4..ec8bfc6 100644
--- a/src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.cpp
+++ b/src/armnn/backends/ClWorkloads/ClSubtractionWorkload.cpp
@@ -3,7 +3,7 @@
// SPDX-License-Identifier: MIT
//
-#include "ClSubtractionBaseWorkload.hpp"
+#include "ClSubtractionWorkload.hpp"
#include "backends/ClTensorHandle.hpp"
#include "backends/CpuTensorHandle.hpp"
@@ -16,11 +16,11 @@
static constexpr arm_compute::ConvertPolicy g_AclConvertPolicy = arm_compute::ConvertPolicy::SATURATE;
template <armnn::DataType... T>
-ClSubtractionBaseWorkload<T...>::ClSubtractionBaseWorkload(const SubtractionQueueDescriptor& descriptor,
+ClSubtractionWorkload<T...>::ClSubtractionWorkload(const SubtractionQueueDescriptor& descriptor,
const WorkloadInfo& info)
: TypedWorkload<SubtractionQueueDescriptor, T...>(descriptor, info)
{
- this->m_Data.ValidateInputsOutputs("ClSubtractionBaseWorkload", 2, 1);
+ this->m_Data.ValidateInputsOutputs("ClSubtractionWorkload", 2, 1);
arm_compute::ICLTensor& input0 = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[0])->GetTensor();
arm_compute::ICLTensor& input1 = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[1])->GetTensor();
@@ -29,9 +29,9 @@
}
template <armnn::DataType... T>
-void ClSubtractionBaseWorkload<T...>::Execute() const
+void ClSubtractionWorkload<T...>::Execute() const
{
- ARMNN_SCOPED_PROFILING_EVENT_CL("ClSubtractionBaseWorkload_Execute");
+ ARMNN_SCOPED_PROFILING_EVENT_CL("ClSubtractionWorkload_Execute");
m_Layer.run();
}
@@ -60,5 +60,5 @@
} //namespace armnn
-template class armnn::ClSubtractionBaseWorkload<armnn::DataType::Float16, armnn::DataType::Float32>;
-template class armnn::ClSubtractionBaseWorkload<armnn::DataType::QuantisedAsymm8>;
+template class armnn::ClSubtractionWorkload<armnn::DataType::Float16, armnn::DataType::Float32>;
+template class armnn::ClSubtractionWorkload<armnn::DataType::QuantisedAsymm8>;
diff --git a/src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.hpp b/src/armnn/backends/ClWorkloads/ClSubtractionWorkload.hpp
similarity index 73%
rename from src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.hpp
rename to src/armnn/backends/ClWorkloads/ClSubtractionWorkload.hpp
index e4595d4..422e6a7 100644
--- a/src/armnn/backends/ClWorkloads/ClSubtractionBaseWorkload.hpp
+++ b/src/armnn/backends/ClWorkloads/ClSubtractionWorkload.hpp
@@ -11,10 +11,10 @@
{
template <armnn::DataType... dataTypes>
-class ClSubtractionBaseWorkload : public TypedWorkload<SubtractionQueueDescriptor, dataTypes...>
+class ClSubtractionWorkload : public TypedWorkload<SubtractionQueueDescriptor, dataTypes...>
{
public:
- ClSubtractionBaseWorkload(const SubtractionQueueDescriptor& descriptor, const WorkloadInfo& info);
+ ClSubtractionWorkload(const SubtractionQueueDescriptor& descriptor, const WorkloadInfo& info);
void Execute() const override;
diff --git a/src/armnn/backends/test/CreateWorkloadCl.cpp b/src/armnn/backends/test/CreateWorkloadCl.cpp
index 340279e..23843bd 100644
--- a/src/armnn/backends/test/CreateWorkloadCl.cpp
+++ b/src/armnn/backends/test/CreateWorkloadCl.cpp
@@ -69,7 +69,7 @@
BOOST_AUTO_TEST_CASE(CreateAdditionFloatWorkload)
{
- ClCreateArithmethicWorkloadTest<ClAdditionFloatWorkload,
+ ClCreateArithmethicWorkloadTest<ClAdditionWorkload<armnn::DataType::Float16, armnn::DataType::Float32>,
AdditionQueueDescriptor,
AdditionLayer,
armnn::DataType::Float32>();
@@ -77,7 +77,7 @@
BOOST_AUTO_TEST_CASE(CreateAdditionFloat16Workload)
{
- ClCreateArithmethicWorkloadTest<ClAdditionFloatWorkload,
+ ClCreateArithmethicWorkloadTest<ClAdditionWorkload<armnn::DataType::Float16, armnn::DataType::Float32>,
AdditionQueueDescriptor,
AdditionLayer,
armnn::DataType::Float16>();
@@ -85,7 +85,7 @@
BOOST_AUTO_TEST_CASE(CreateSubtractionFloatWorkload)
{
- ClCreateArithmethicWorkloadTest<ClSubtractionFloatWorkload,
+ ClCreateArithmethicWorkloadTest<ClSubtractionWorkload<armnn::DataType::Float16, armnn::DataType::Float32>,
SubtractionQueueDescriptor,
SubtractionLayer,
armnn::DataType::Float32>();
@@ -93,7 +93,7 @@
BOOST_AUTO_TEST_CASE(CreateSubtractionFloat16Workload)
{
- ClCreateArithmethicWorkloadTest<ClSubtractionFloatWorkload,
+ ClCreateArithmethicWorkloadTest<ClSubtractionWorkload<armnn::DataType::Float16, armnn::DataType::Float32>,
SubtractionQueueDescriptor,
SubtractionLayer,
armnn::DataType::Float16>();