IVGCVSW-4374 Add NEON backend support for SpaceToBatchNd
* Added NeonSpaceToBatchNdWorkload class.
* Added CreateSpaceToBatchNd implementation to NeonWorkloadFactory.
* Added IsSpaceToBatchNdSupported implementation to NeonLayerSupport.
* Enabled SpaceToBatchNd tests on Neon backend.
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Ic7d469a380482ec9febd44450f72dd7e53cda03f
diff --git a/src/backends/neon/workloads/CMakeLists.txt b/src/backends/neon/workloads/CMakeLists.txt
index 44db6d2..d2c549e 100644
--- a/src/backends/neon/workloads/CMakeLists.txt
+++ b/src/backends/neon/workloads/CMakeLists.txt
@@ -80,6 +80,8 @@
NeonSoftmaxFloatWorkload.hpp
NeonSoftmaxUint8Workload.cpp
NeonSoftmaxUint8Workload.hpp
+ NeonSpaceToBatchNdWorkload.cpp
+ NeonSpaceToBatchNdWorkload.hpp
NeonSpaceToDepthWorkload.cpp
NeonSpaceToDepthWorkload.hpp
NeonSplitterWorkload.cpp
diff --git a/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp
new file mode 100644
index 0000000..199e926
--- /dev/null
+++ b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp
@@ -0,0 +1,83 @@
+//
+// Copyright © 2020 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "NeonSpaceToBatchNdWorkload.hpp"
+
+#include "NeonWorkloadUtils.hpp"
+#include <ResolveType.hpp>
+
+namespace armnn
+{
+
+using namespace armcomputetensorutils;
+
+arm_compute::Status NeonSpaceToBatchNdWorkloadValidate(const TensorInfo& input,
+ const TensorInfo& output,
+ const SpaceToBatchNdDescriptor& descriptor)
+{
+ const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
+ const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
+
+ // ArmNN blockShape is [H, W] Cl asks for W, H
+ int32_t blockHeight = boost::numeric_cast<int32_t>(descriptor.m_BlockShape[0]);
+ int32_t blockWidth = boost::numeric_cast<int32_t>(descriptor.m_BlockShape[1]);
+
+ arm_compute::Size2D paddingLeftTop = BuildArmComputeSize2D(
+ descriptor.m_PadList[1].first, descriptor.m_PadList[0].first);
+ arm_compute::Size2D paddingRightBottom = BuildArmComputeSize2D(
+ descriptor.m_PadList[1].second, descriptor.m_PadList[0].second);
+
+ return arm_compute::NESpaceToBatchLayer::validate(&aclInputInfo,
+ blockWidth,
+ blockHeight,
+ paddingLeftTop,
+ paddingRightBottom,
+ &aclOutputInfo);
+}
+
+NeonSpaceToBatchNdWorkload::NeonSpaceToBatchNdWorkload(const SpaceToBatchNdQueueDescriptor& desc,
+ const WorkloadInfo& info)
+ : BaseWorkload<SpaceToBatchNdQueueDescriptor>(desc, info)
+{
+ m_Data.ValidateInputsOutputs("NESpaceToBatchNdWorkload", 1, 1);
+
+ arm_compute::ITensor& input =
+ boost::polymorphic_pointer_downcast<IAclTensorHandle>(m_Data.m_Inputs[0])->GetTensor();
+ arm_compute::ITensor& output =
+ boost::polymorphic_pointer_downcast<IAclTensorHandle>(m_Data.m_Outputs[0])->GetTensor();
+
+ // ArmNN blockShape is [H, W] Cl asks for W, H
+ int32_t blockHeight = boost::numeric_cast<int32_t>(m_Data.m_Parameters.m_BlockShape[0]);
+ int32_t blockWidth = boost::numeric_cast<int32_t>(m_Data.m_Parameters.m_BlockShape[1]);
+
+ arm_compute::Size2D paddingLeftTop = BuildArmComputeSize2D(
+ m_Data.m_Parameters.m_PadList[1].first, m_Data.m_Parameters.m_PadList[0].first);
+ arm_compute::Size2D paddingRightBottom = BuildArmComputeSize2D(
+ m_Data.m_Parameters.m_PadList[1].second, m_Data.m_Parameters.m_PadList[0].second);
+
+ arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout);
+ input.info()->set_data_layout(aclDataLayout);
+ output.info()->set_data_layout(aclDataLayout);
+
+ m_Layer.reset(new arm_compute::NESpaceToBatchLayer());
+ m_Layer->configure(&input,
+ blockWidth,
+ blockHeight,
+ paddingLeftTop,
+ paddingRightBottom,
+ &output);
+ m_Layer->prepare();
+}
+
+void NeonSpaceToBatchNdWorkload::Execute() const
+{
+ if (m_Layer)
+ {
+ ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonSpaceToBatchNdWorkload_Execute");
+ m_Layer->run();
+ }
+}
+
+} //namespace armnn
\ No newline at end of file
diff --git a/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.hpp b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.hpp
new file mode 100644
index 0000000..feb8dba
--- /dev/null
+++ b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.hpp
@@ -0,0 +1,35 @@
+//
+// Copyright © 2020 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <armnn/Tensor.hpp>
+#include <armnn/Descriptors.hpp>
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/runtime/NEON/functions/NESpaceToBatchLayer.h>
+
+namespace armnn
+{
+
+arm_compute::Status NeonSpaceToBatchNdWorkloadValidate(const TensorInfo& input,
+ const TensorInfo& output,
+ const SpaceToBatchNdDescriptor& descriptor);
+
+class NeonSpaceToBatchNdWorkload : public BaseWorkload<SpaceToBatchNdQueueDescriptor>
+{
+public:
+ using BaseWorkload<SpaceToBatchNdQueueDescriptor>::BaseWorkload;
+
+ NeonSpaceToBatchNdWorkload(const SpaceToBatchNdQueueDescriptor& descriptor, const WorkloadInfo& info);
+
+ virtual void Execute() const override;
+
+private:
+ mutable std::unique_ptr<arm_compute::NESpaceToBatchLayer> m_Layer;
+};
+
+} //namespace armnn
\ No newline at end of file
diff --git a/src/backends/neon/workloads/NeonWorkloads.hpp b/src/backends/neon/workloads/NeonWorkloads.hpp
index dc9bef3..104504e 100644
--- a/src/backends/neon/workloads/NeonWorkloads.hpp
+++ b/src/backends/neon/workloads/NeonWorkloads.hpp
@@ -41,6 +41,7 @@
#include "NeonSliceWorkload.hpp"
#include "NeonSoftmaxFloatWorkload.hpp"
#include "NeonSoftmaxUint8Workload.hpp"
+#include "NeonSpaceToBatchNdWorkload.hpp"
#include "NeonSpaceToDepthWorkload.hpp"
#include "NeonSplitterWorkload.hpp"
#include "NeonStackWorkload.hpp"