IVGCVSW-5093 Add NEON Logical workload

* Add NEON Logical workloads for NOT,
  AND and OR.
* Enable Layer and IsSupported tests on NEON.

Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: Ibca59530457a664ca3d77751825642f8daf52fab
diff --git a/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp b/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp
new file mode 100644
index 0000000..d85e05c
--- /dev/null
+++ b/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp
@@ -0,0 +1,51 @@
+//
+// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "NeonLogicalAndWorkload.hpp"
+
+#include "NeonWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorHandle.hpp>
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+
+#include <armnn/utility/PolymorphicDowncast.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status NeonLogicalAndWorkloadValidate(const TensorInfo& input0,
+                                                   const TensorInfo& input1,
+                                                   const TensorInfo& output)
+{
+    const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0);
+    const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1);
+    const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
+
+    const arm_compute::Status aclStatus = arm_compute::NELogicalAnd::validate(&aclInputInfo0,
+                                                                              &aclInputInfo1,
+                                                                              &aclOutputInfo);
+    return aclStatus;
+}
+
+NeonLogicalAndWorkload::NeonLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor,
+                                               const WorkloadInfo& info)
+    : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info)
+{
+    m_Data.ValidateInputsOutputs("NeonLogicalAndWorkload", 2, 1);
+
+    arm_compute::ITensor& input0 = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ITensor& input1 = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Inputs[1])->GetTensor();
+    arm_compute::ITensor& output = PolymorphicDowncast<IAclTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+    m_LogicalAndLayer.configure(&input0, &input1, &output);
+}
+
+void NeonLogicalAndWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonLogicalAndWorkload_Execute");
+    m_LogicalAndLayer.run();
+}
+
+} // namespace armnn