IVGCVSW-3829 Add CL workload for RSQRT
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Idf40ed0ebf2af3170137bf3a3cb5a9635a203d4a
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt
index 3e2ac76..7578a40 100644
--- a/src/backends/cl/workloads/CMakeLists.txt
+++ b/src/backends/cl/workloads/CMakeLists.txt
@@ -66,6 +66,8 @@
ClReshapeWorkload.hpp
ClResizeWorkload.cpp
ClResizeWorkload.hpp
+ ClRsqrtWorkload.cpp
+ ClRsqrtWorkload.hpp
ClSoftmaxBaseWorkload.cpp
ClSoftmaxBaseWorkload.hpp
ClSoftmaxFloatWorkload.cpp
diff --git a/src/backends/cl/workloads/ClRsqrtWorkload.cpp b/src/backends/cl/workloads/ClRsqrtWorkload.cpp
new file mode 100644
index 0000000..be68759
--- /dev/null
+++ b/src/backends/cl/workloads/ClRsqrtWorkload.cpp
@@ -0,0 +1,44 @@
+//
+// Copyright © 2019 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClRsqrtWorkload.hpp"
+
+#include "ClWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+
+#include <cl/ClTensorHandle.hpp>
+
+#include <boost/cast.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status ClRsqrtWorkloadValidate(const TensorInfo& input, const TensorInfo& output)
+{
+ const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+ const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+ return arm_compute::CLRsqrtLayer::validate(&aclInput, &aclOutput);
+}
+
+ClRsqrtWorkload::ClRsqrtWorkload(const RsqrtQueueDescriptor& descriptor, const WorkloadInfo& info)
+ : BaseWorkload<RsqrtQueueDescriptor>(descriptor, info)
+{
+ m_Data.ValidateInputsOutputs("ClRsqrtWorkload", 1, 1);
+
+ arm_compute::ICLTensor& input = boost::polymorphic_downcast<ClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+ arm_compute::ICLTensor& output = boost::polymorphic_downcast<ClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+ m_RsqrtLayer.configure(&input, &output);
+}
+
+void ClRsqrtWorkload::Execute() const
+{
+ ARMNN_SCOPED_PROFILING_EVENT_CL("ClRsqrtWorkload_Execute");
+ RunClFunction(m_RsqrtLayer, CHECK_LOCATION());
+}
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClRsqrtWorkload.hpp b/src/backends/cl/workloads/ClRsqrtWorkload.hpp
new file mode 100644
index 0000000..8fb6229
--- /dev/null
+++ b/src/backends/cl/workloads/ClRsqrtWorkload.hpp
@@ -0,0 +1,28 @@
+//
+// Copyright © 2019 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/core/Error.h>
+#include <arm_compute/runtime/CL/functions/CLElementWiseUnaryLayer.h>
+
+namespace armnn
+{
+
+arm_compute::Status ClRsqrtWorkloadValidate(const TensorInfo& input, const TensorInfo& output);
+
+class ClRsqrtWorkload : public BaseWorkload<RsqrtQueueDescriptor>
+{
+public:
+ ClRsqrtWorkload(const RsqrtQueueDescriptor& descriptor, const WorkloadInfo& info);
+ virtual void Execute() const override;
+
+private:
+ mutable arm_compute::CLRsqrtLayer m_RsqrtLayer;
+};
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp
index 45030e4..7525f84 100644
--- a/src/backends/cl/workloads/ClWorkloads.hpp
+++ b/src/backends/cl/workloads/ClWorkloads.hpp
@@ -33,6 +33,7 @@
#include "ClQuantizedLstmWorkload.hpp"
#include "ClReshapeWorkload.hpp"
#include "ClResizeWorkload.hpp"
+#include "ClRsqrtWorkload.hpp"
#include "ClSoftmaxFloatWorkload.hpp"
#include "ClSoftmaxUint8Workload.hpp"
#include "ClSpaceToBatchNdWorkload.hpp"