IVGCVSW-7570 GpuFsa Op: Add ElemenWiseBinary Operators available
* Refactor to generalize
* Add MUL
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I2ee273d50d3a8b114b5a41abc8ee7585b15e3308
diff --git a/src/backends/gpuFsa/layers/GpuFsaElementwiseBinary.hpp b/src/backends/gpuFsa/layers/GpuFsaElementwiseBinary.hpp
new file mode 100644
index 0000000..11583f1
--- /dev/null
+++ b/src/backends/gpuFsa/layers/GpuFsaElementwiseBinary.hpp
@@ -0,0 +1,22 @@
+//
+// Copyright © 2024 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+#pragma once
+
+#include <armnn/Descriptors.hpp>
+
+#include <gpuFsa/GpuFsaBackend.hpp>
+
+namespace armnn
+{
+arm_compute::Status GpuFsaElementwiseBinaryValidate(const TensorInfo& input0,
+ const TensorInfo& input1,
+ const ElementwiseBinaryDescriptor& descriptor);
+
+void GpuFsaElementwiseBinaryCreateOp(GpuFsaPreCompiledBlob* blob,
+ const TensorInfo& input0,
+ const TensorInfo& input1,
+ const ElementwiseBinaryDescriptor& descriptor);
+
+} // namespace armnn
\ No newline at end of file