commit 21bda1405d2cb49fc873583b41a48836b33d285e
author Teresa Charlin <teresa.charlinreyes@arm.com> Wed Mar 13 16:10:32 2024 +0000
committer TeresaARM <teresa.charlinreyes@arm.com> Wed May 08 14:22:08 2024 +0000
tree 6d57debcf6be6aeb28a3e3951757c73ae5636250
parent 8208e2b8b1d09d0e89394ae134eb61e390dfd93c

IVGCVSW-8235 ScatterNd Operator Implementation (CL)


Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I59fe96b0a272fa6984bfc172bf3e110476f3ce7b

delegate/test/ScatterNdTest.cpp

diff --git a/delegate/test/ScatterNdTest.cpp b/delegate/test/ScatterNdTest.cpp
index 2b2a67c..802efc2 100644
--- a/delegate/test/ScatterNdTest.cpp
+++ b/delegate/test/ScatterNdTest.cpp
@@ -275,13 +275,13 @@
 
 TEST_CASE ("ScatterNd_1Dim_FP32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd1DimTest<float>(tflite::TensorType_FLOAT32, backends);
 }
 
 TEST_CASE ("ScatterNd_1Dim_INT32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd1DimTest<int32_t>(tflite::TensorType_INT32, backends);
 }
 
@@ -299,13 +299,13 @@
 
 TEST_CASE ("ScatterNd_2Dim_FP32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd2DimTest<float>(tflite::TensorType_FLOAT32, backends);
 }
 
 TEST_CASE ("ScatterNd_2Dim_INT32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd2DimTest<int32_t>(tflite::TensorType_INT32, backends);
 }
 
@@ -323,13 +323,13 @@
 
 TEST_CASE ("ScatterNd_2Dim_1Outter_1Inner_FP32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd2Dim1Outter1InnerTest<float>(tflite::TensorType_FLOAT32, backends);
 }
 
 TEST_CASE ("ScatterNd_2Dim_1Outter_1Inner_INT32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd2Dim1Outter1InnerTest<int32_t>(tflite::TensorType_INT32, backends);
 }
 
@@ -347,13 +347,13 @@
 
 TEST_CASE ("ScatterNd_3Dim_FP32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd3DimTest<float>(tflite::TensorType_FLOAT32, backends);
 }
 
 TEST_CASE ("ScatterNd_3Dim_INT32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd3DimTest<int32_t>(tflite::TensorType_INT32, backends);
 }
 
@@ -371,13 +371,13 @@
 
 TEST_CASE ("ScatterNd_3Dim_1Outter_2Inner_FP32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd3Dim1Outter2InnerTest<float>(tflite::TensorType_FLOAT32, backends);
 }
 
 TEST_CASE ("ScatterNd_3Dim_1Outter_2Inner_INT32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd3Dim1Outter2InnerTest<int32_t>(tflite::TensorType_INT32, backends);
 }
 
@@ -395,13 +395,13 @@
 
 TEST_CASE ("ScatterNd_3Dim_2Outter_1Inner_FP32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd3Dim2Outter1InnerTest<float>(tflite::TensorType_FLOAT32, backends);
 }
 
 TEST_CASE ("ScatterNd_3Dim_2Outter_1Inner_INT32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNd3Dim2Outter1InnerTest<int32_t>(tflite::TensorType_INT32, backends);
 }
 
@@ -419,13 +419,13 @@
 
 TEST_CASE ("ScatterNd_4Dim_FP32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNdDim4<float>(tflite::TensorType_FLOAT32, backends);
 }
 
 TEST_CASE ("ScatterNd_4Dim_INT32_Test")
 {
-    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+    std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef, armnn::Compute::GpuAcc };
     ScatterNdDim4<int32_t>(tflite::TensorType_INT32, backends);
 }