IVGCVSW-3194 Refactor SpaceToBatchNd workload
Change-Id: Iac2ded9b20c37299e3de51465dcbfb5a7bfc52d5
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
diff --git a/src/backends/reference/workloads/SpaceToBatchNd.cpp b/src/backends/reference/workloads/SpaceToBatchNd.cpp
index 51e45a8..0bc2396 100644
--- a/src/backends/reference/workloads/SpaceToBatchNd.cpp
+++ b/src/backends/reference/workloads/SpaceToBatchNd.cpp
@@ -31,12 +31,11 @@
}
}
-template<typename T>
void SpaceToBatchNd(const TensorInfo& inputInfo,
const TensorInfo& outputInfo,
const SpaceToBatchNdDescriptor& params,
- const T* inputData,
- T* outputData)
+ Decoder<float>& inputData,
+ Encoder<float>& outputData)
{
DataLayoutIndexed dataLayout = params.m_DataLayout;
@@ -83,7 +82,9 @@
outW,
c,
dataLayout);
- outputData[outOffset] = 0;
+ outputData += outOffset;
+ outputData.Set(0);
+ outputData -= outOffset;
}
}
else
@@ -104,7 +105,11 @@
c,
dataLayout);
- outputData[outOffset] = inputData[inOffset];
+ outputData += outOffset;
+ inputData += inOffset;
+ outputData.Set(inputData.Get());
+ inputData -= inOffset;
+ outputData -= outOffset;
}
}
}
@@ -112,16 +117,10 @@
}
}
-template void SpaceToBatchNd<float>(const TensorInfo& inputInfo,
- const TensorInfo& outputInfo,
- const SpaceToBatchNdDescriptor& params,
- const float* inputData,
- float* outData);
-
-template void SpaceToBatchNd<uint8_t>(const TensorInfo& inputInfo,
- const TensorInfo& outputInfo,
- const SpaceToBatchNdDescriptor& params,
- const uint8_t* inputData,
- uint8_t* outData);
+void SpaceToBatchNd(const TensorInfo& inputInfo,
+ const TensorInfo& outputInfo,
+ const SpaceToBatchNdDescriptor& params,
+ Decoder<float>& inputData,
+ Encoder<float>& outData);
} //namespace armnn