IVGCVSW-3554 Update workloads to pass Softmax Axis Parameter to Backends

 * Add check in CL and Neon to ensure axis is 1 otherwise
   return unsupported.
 * Edit CreateWorkload test and JsonPrinter test to ensure axis of 1.

Change-Id: I499b405532e26fefc2dd1c18b6dc6005813b5604
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
diff --git a/src/backends/cl/ClLayerSupport.cpp b/src/backends/cl/ClLayerSupport.cpp
index 7eb1dcf..b737daf 100644
--- a/src/backends/cl/ClLayerSupport.cpp
+++ b/src/backends/cl/ClLayerSupport.cpp
@@ -594,8 +594,14 @@
                                         const SoftmaxDescriptor& descriptor,
                                         Optional<std::string&> reasonIfUnsupported) const
 {
+    if (!(descriptor.m_Axis == 1 ||
+         (descriptor.m_Axis < 0 && static_cast<int>(input.GetNumDimensions()) + descriptor.m_Axis == 1)))
+    {
+        SetValueChecked(reasonIfUnsupported, "Cl Softmax: Only supports Axis equal to 1.");
+        return false;
+    }
     ignore_unused(descriptor);
-    FORWARD_WORKLOAD_VALIDATE_FUNC(ClSoftmaxWorkloadValidate, reasonIfUnsupported, input, output);
+    FORWARD_WORKLOAD_VALIDATE_FUNC(ClSoftmaxWorkloadValidate, reasonIfUnsupported, input, output, descriptor);
 }
 
 bool ClLayerSupport::IsSpaceToBatchNdSupported(const TensorInfo& input,
diff --git a/src/backends/cl/workloads/ClSoftmaxBaseWorkload.cpp b/src/backends/cl/workloads/ClSoftmaxBaseWorkload.cpp
index b1dc404..2f6d380 100644
--- a/src/backends/cl/workloads/ClSoftmaxBaseWorkload.cpp
+++ b/src/backends/cl/workloads/ClSoftmaxBaseWorkload.cpp
@@ -6,6 +6,7 @@
 #include "ClSoftmaxBaseWorkload.hpp"
 
 #include <aclCommon/ArmComputeTensorUtils.hpp>
+#include <aclCommon/ArmComputeUtils.hpp>
 
 #include <arm_compute/runtime/CL/functions/CLSoftmaxLayer.h>
 
@@ -13,12 +14,14 @@
 {
 
 arm_compute::Status ClSoftmaxWorkloadValidate(const TensorInfo& input,
-                                              const TensorInfo& output)
+                                              const TensorInfo& output,
+                                              const SoftmaxDescriptor& descriptor)
 {
     const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
     const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
 
-    return arm_compute::CLSoftmaxLayer::validate(&aclInputInfo, &aclOutputInfo);
+    unsigned int aclAxis = ComputeSoftmaxAclAxis(input);
+    return arm_compute::CLSoftmaxLayer::validate(&aclInputInfo, &aclOutputInfo, descriptor.m_Beta, aclAxis);
 }
 
 }
diff --git a/src/backends/cl/workloads/ClSoftmaxBaseWorkload.hpp b/src/backends/cl/workloads/ClSoftmaxBaseWorkload.hpp
index b800056..8d73060 100644
--- a/src/backends/cl/workloads/ClSoftmaxBaseWorkload.hpp
+++ b/src/backends/cl/workloads/ClSoftmaxBaseWorkload.hpp
@@ -5,6 +5,7 @@
 
 #pragma once
 
+#include <armnn/Descriptors.hpp>
 #include <armnn/Tensor.hpp>
 #include <arm_compute/core/Error.h>
 
@@ -12,6 +13,7 @@
 {
 
 arm_compute::Status ClSoftmaxWorkloadValidate(const TensorInfo& input,
-                                              const TensorInfo& output);
+                                              const TensorInfo& output,
+                                              const SoftmaxDescriptor& descriptor);
 
 } // namespace armnn
diff --git a/src/backends/cl/workloads/ClSoftmaxFloatWorkload.cpp b/src/backends/cl/workloads/ClSoftmaxFloatWorkload.cpp
index c78ab03..f2f8d17 100644
--- a/src/backends/cl/workloads/ClSoftmaxFloatWorkload.cpp
+++ b/src/backends/cl/workloads/ClSoftmaxFloatWorkload.cpp
@@ -14,7 +14,7 @@
 {
 
 ClSoftmaxFloatWorkload::ClSoftmaxFloatWorkload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info,
-                                                   std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
+                                               std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : FloatWorkload<SoftmaxQueueDescriptor>(descriptor, info)
     , m_SoftmaxLayer(memoryManager)
 {