commit 4cf29d6b4bf1c8c6e6080099cb5eddfd079ee68c
author John Mcloughlin <john.mcloughlin@arm.com> Mon Sep 25 14:10:32 2023 +0100
committer john.mcloughlin <john.mcloughlin@arm.com> Tue Sep 26 17:21:22 2023 +0000
tree ba9affa8ec926e0b5cc9a9c4cdfdd1f9cf2aa3c1
parent a2135bb3737bd7c86c6ea9ed8df2272e5f3ebcb0

GitHub #734 Add ExecuteNetwork support for S64 bit output

* Add Signed 64 bit support for Output and Debug Layers

Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com>
Change-Id: I991c2d5f1067b16d0fac362e7406305fbe90d034

src/backends/reference/RefWorkloadFactory.cpp

diff --git a/src/backends/reference/RefWorkloadFactory.cpp b/src/backends/reference/RefWorkloadFactory.cpp
index c4d9583..ad6ec9a 100644
--- a/src/backends/reference/RefWorkloadFactory.cpp
+++ b/src/backends/reference/RefWorkloadFactory.cpp
@@ -45,6 +45,10 @@
     }
     return false;
 }
+bool IsSigned64(const WorkloadInfo& info)
+{
+    return IsDataType<DataType::Signed64>(info);
+}
 bool IsSigned32(const WorkloadInfo& info)
 {
     return IsDataType<DataType::Signed32>(info);
@@ -263,6 +267,10 @@
             {
                 return std::make_unique<RefDebugSigned32Workload>(*debugQueueDescriptor, info);
             }
+            if (IsSigned64(info))
+            {
+                return std::make_unique<RefDebugSigned64Workload>(*debugQueueDescriptor, info);
+            }
             return MakeWorkload<RefDebugFloat32Workload, RefDebugQAsymmU8Workload>(*debugQueueDescriptor, info);
         }
         case LayerType::DepthToSpace:

src/backends/reference/workloads/Debug.cpp

diff --git a/src/backends/reference/workloads/Debug.cpp b/src/backends/reference/workloads/Debug.cpp
index 50aecc8..564dd7a 100644
--- a/src/backends/reference/workloads/Debug.cpp
+++ b/src/backends/reference/workloads/Debug.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -165,4 +165,11 @@
                              unsigned int slotIndex,
                              bool outputsToFile);
 
+template void Debug<int64_t>(const TensorInfo& inputInfo,
+                             const int64_t* inputData,
+                             LayerGuid guid,
+                             const std::string& layerName,
+                             unsigned int slotIndex,
+                             bool outputsToFile);
+
 } // namespace armnn

src/backends/reference/workloads/RefDebugWorkload.cpp

diff --git a/src/backends/reference/workloads/RefDebugWorkload.cpp b/src/backends/reference/workloads/RefDebugWorkload.cpp
index 3653bb6..94eed4f 100644
--- a/src/backends/reference/workloads/RefDebugWorkload.cpp
+++ b/src/backends/reference/workloads/RefDebugWorkload.cpp
@@ -65,5 +65,6 @@
 template class RefDebugWorkload<DataType::QSymmS16>;
 template class RefDebugWorkload<DataType::QSymmS8>;
 template class RefDebugWorkload<DataType::Signed32>;
+template class RefDebugWorkload<DataType::Signed64>;
 
 } // namespace armnn

src/backends/reference/workloads/RefDebugWorkload.hpp

diff --git a/src/backends/reference/workloads/RefDebugWorkload.hpp b/src/backends/reference/workloads/RefDebugWorkload.hpp
index 0dd98d2..4c99990 100644
--- a/src/backends/reference/workloads/RefDebugWorkload.hpp
+++ b/src/backends/reference/workloads/RefDebugWorkload.hpp
@@ -47,5 +47,6 @@
 using RefDebugQSymmS16Workload  = RefDebugWorkload<DataType::QSymmS16>;
 using RefDebugQSymmS8Workload   = RefDebugWorkload<DataType::QSymmS8>;
 using RefDebugSigned32Workload  = RefDebugWorkload<DataType::Signed32>;
+using RefDebugSigned64Workload  = RefDebugWorkload<DataType::Signed64>;
 
 } // namespace armnn

tests/ExecuteNetwork/ArmNNExecutor.cpp

diff --git a/tests/ExecuteNetwork/ArmNNExecutor.cpp b/tests/ExecuteNetwork/ArmNNExecutor.cpp
index 8ce3689..42d41ef 100644
--- a/tests/ExecuteNetwork/ArmNNExecutor.cpp
+++ b/tests/ExecuteNetwork/ArmNNExecutor.cpp
@@ -682,6 +682,11 @@
                 PrintTensor<int>(outputWriteInfo, "%d ");
                 break;
             }
+            case armnn::DataType::Signed64:
+            {
+                PrintTensor<int64_t>(outputWriteInfo, "%ld ");
+                break;
+            }
             case armnn::DataType::QSymmS8:
             case armnn::DataType::QAsymmS8:
             {
@@ -697,7 +702,6 @@
             case armnn::DataType::Float16:
             case armnn::DataType::QSymmS16:
             case armnn::DataType::BFloat16:
-            case armnn::DataType::Signed64:
             default:
             {
                 LogAndThrow("Unexpected DataType");