commit 588cbdfbd20dc524674db40c07cde3c4ffb85d11
author Teresa Charlin <teresa.charlinreyes@arm.com> Wed Jan 19 15:55:37 2022 +0000
committer TeresaARM <teresa.charlinreyes@arm.com> Wed Jan 26 20:30:55 2022 +0000
tree 99fe40838290e08103ca668f20361033264e90e4
parent 0d77ae103f88c7a6e6b09ef0bc2e0e47a59c4364

IVGCVSW-6685-6686 Modify workloads to extend Neon/Cl BaseWorkload

* Neon workloads to extend NeonBaseWorkload instead of BaseWorkload
* Cl workload to extend ClBaseWorkload instead of BaseWorkload


Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I8f39a31a89a8865ac4acf18573ab290d548d2864

src/backends/cl/workloads/ClConvolution2dWorkload.cpp

diff --git a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp
index 9575305..705e92d 100644
--- a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp
+++ b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -67,7 +67,7 @@
                                                  std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager,
                                                  const arm_compute::CLCompileContext& clCompileContext,
                                                  const bool isFastMathEnabled)
-    : BaseWorkload<Convolution2dQueueDescriptor>(descriptor, info)
+    : ClBaseWorkload<Convolution2dQueueDescriptor>(descriptor, info)
     , m_ConvolutionLayer(memoryManager)
 {
     ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "ClConvolution2dWorkload");