IVGCVSW-6685-6686 Modify workloads to extend Neon/Cl BaseWorkload
* Neon workloads to extend NeonBaseWorkload instead of BaseWorkload
* Cl workload to extend ClBaseWorkload instead of BaseWorkload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I8f39a31a89a8865ac4acf18573ab290d548d2864
diff --git a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp
index c0ba813..88cc0b3 100644
--- a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp
+++ b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp
@@ -1,5 +1,5 @@
//
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
@@ -8,7 +8,7 @@
#include <armnn/Tensor.hpp>
#include <armnn/Descriptors.hpp>
-#include <armnn/backends/Workload.hpp>
+#include "ClBaseWorkload.hpp"
#include <arm_compute/runtime/CL/functions/CLDeconvolutionLayer.h>
#include <arm_compute/runtime/MemoryManagerOnDemand.h>
@@ -24,7 +24,7 @@
const TensorInfo& weights,
const Optional<TensorInfo>& biases);
-class ClTransposeConvolution2dWorkload : public BaseWorkload<TransposeConvolution2dQueueDescriptor>
+class ClTransposeConvolution2dWorkload : public ClBaseWorkload<TransposeConvolution2dQueueDescriptor>
{
public:
ClTransposeConvolution2dWorkload(const TransposeConvolution2dQueueDescriptor& descriptor,