IVGCVSW-7060 Add GetMemoryRequirements to IWorkload
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I8c59f1feb9c44351427715b08d762b5a73320af5
diff --git a/include/armnn/Types.hpp b/include/armnn/Types.hpp
index cc704a6..af75513 100644
--- a/include/armnn/Types.hpp
+++ b/include/armnn/Types.hpp
@@ -1,5 +1,5 @@
//
-// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
#pragma once
@@ -19,7 +19,7 @@
class ProfilingGuid;
-} // namespace armn
+} // namespace arm
} // namespace pipe
/// Define LayerGuid type.
diff --git a/include/armnn/backends/IWorkload.hpp b/include/armnn/backends/IWorkload.hpp
index c7bc5da..22baf92 100644
--- a/include/armnn/backends/IWorkload.hpp
+++ b/include/armnn/backends/IWorkload.hpp
@@ -1,10 +1,11 @@
//
-// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
#pragma once
#include <armnn/Types.hpp>
+#include <armnn/backends/WorkloadInfo.hpp>
namespace armnn
{
@@ -44,6 +45,11 @@
virtual void ReplaceOutputTensorHandle(ITensorHandle* /*output*/, unsigned int /*slot*/) = 0;
virtual void RegisterDebugCallback(const DebugCallbackFunction& /*func*/) {}
+
+ virtual armnn::Optional<armnn::MemoryRequirements> GetMemoryRequirements()
+ {
+ return armnn::EmptyOptional();
+ }
};
} //namespace armnn
diff --git a/include/armnn/backends/WorkloadInfo.hpp b/include/armnn/backends/WorkloadInfo.hpp
index 1d6967e..a7a1e1e 100644
--- a/include/armnn/backends/WorkloadInfo.hpp
+++ b/include/armnn/backends/WorkloadInfo.hpp
@@ -1,5 +1,5 @@
//
-// Copyright © 2020 Arm Ltd. All rights reserved.
+// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
#pragma once
@@ -22,4 +22,16 @@
Optional<std::string> m_ConvolutionMethod = EmptyOptional();
};
+struct MemoryInfo
+{
+ unsigned int m_OutputSlotIndex;
+ size_t m_Size{ 0 };
+ size_t m_Alignment{ 64 };
+};
+
+struct MemoryRequirements
+{
+ armnn::Optional<std::vector<MemoryInfo>> m_IntraLayerTensors;
+};
+
} //namespace armnn