IVGCVSW-3723 Adding reference workload support for ArgMinMax
Change-Id: I65209ecec4e3abf808163239748d6e830568c2e3
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
diff --git a/src/backends/reference/workloads/RefArgMinMaxWorkload.cpp b/src/backends/reference/workloads/RefArgMinMaxWorkload.cpp
new file mode 100644
index 0000000..5f1eb73
--- /dev/null
+++ b/src/backends/reference/workloads/RefArgMinMaxWorkload.cpp
@@ -0,0 +1,38 @@
+//
+// Copyright © 2019 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "RefArgMinMaxWorkload.hpp"
+
+#include "ArgMinMax.hpp"
+#include "RefWorkloadUtils.hpp"
+#include "Decoders.hpp"
+#include "Encoders.hpp"
+#include "Profiling.hpp"
+
+namespace armnn
+{
+RefArgMinMaxWorkload::RefArgMinMaxWorkload(
+ const ArgMinMaxQueueDescriptor& descriptor,
+ const WorkloadInfo& info)
+ : BaseWorkload<ArgMinMaxQueueDescriptor>(descriptor, info) {}
+
+void RefArgMinMaxWorkload::Execute() const
+{
+ ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefArgMinMaxWorkload_Execute");
+
+ const TensorInfo &inputTensorInfo = GetTensorInfo(m_Data.m_Inputs[0]);
+
+ std::unique_ptr<Decoder<float>> decoderPtr = MakeDecoder<float>(inputTensorInfo, m_Data.m_Inputs[0]->Map());
+ Decoder<float> &decoder = *decoderPtr;
+
+ const TensorInfo &outputTensorInfo = GetTensorInfo(m_Data.m_Outputs[0]);
+
+ int32_t* output = GetOutputTensorData<int32_t>(0, m_Data);
+
+ ArgMinMax(decoder, output, inputTensorInfo, outputTensorInfo, m_Data.m_Parameters.m_Function,
+ m_Data.m_Parameters.m_Axis);
+}
+
+} //namespace armnn
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