IVGCVSW-1199: BATCH_TO_SPACE_ND integrate Arm Compute CL
Change-Id: Ic772acf481caed6e8a6b99f68a63dfc2a34c24dc
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt
index 736cf5c..b7571f6 100644
--- a/src/backends/cl/workloads/CMakeLists.txt
+++ b/src/backends/cl/workloads/CMakeLists.txt
@@ -10,6 +10,8 @@
ClAdditionWorkload.hpp
ClBatchNormalizationFloatWorkload.cpp
ClBatchNormalizationFloatWorkload.hpp
+ ClBatchToSpaceNdWorkload.cpp
+ ClBatchToSpaceNdWorkload.hpp
ClConstantWorkload.cpp
ClConstantWorkload.hpp
ClConvertFp16ToFp32Workload.cpp
diff --git a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp
new file mode 100644
index 0000000..a714e03
--- /dev/null
+++ b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp
@@ -0,0 +1,64 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClBatchToSpaceNdWorkload.hpp"
+
+#include <cl/ClTensorHandle.hpp>
+#include <backendsCommon/CpuTensorHandle.hpp>
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+
+#include "ClWorkloadUtils.hpp"
+
+namespace armnn
+{
+using namespace armcomputetensorutils;
+
+ClBatchToSpaceNdWorkload::ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& desc,
+ const WorkloadInfo& info)
+ : BaseWorkload<BatchToSpaceNdQueueDescriptor>(desc, info)
+{
+ m_Data.ValidateInputsOutputs("ClBatchToSpaceNdWorkload", 1, 1);
+
+ arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout);
+
+ arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+ input.info()->set_data_layout(aclDataLayout);
+
+ // ArmNN blockShape is [H, W] Cl asks for W, H
+ int32_t blockHeight = boost::numeric_cast<int32_t>(desc.m_Parameters.m_BlockShape[0]);
+ int32_t blockWidth = boost::numeric_cast<int32_t>(desc.m_Parameters.m_BlockShape[1]);
+
+ arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+ output.info()->set_data_layout(aclDataLayout);
+
+ m_Layer.configure(&input, blockWidth, blockHeight, &output);
+}
+
+void ClBatchToSpaceNdWorkload::Execute() const
+{
+ ARMNN_SCOPED_PROFILING_EVENT_CL("ClBatchToSpaceNdWorkload_Execute");
+ RunClFunction(m_Layer, CHECK_LOCATION());
+}
+
+arm_compute::Status ClBatchToSpaceNdWorkloadValidate(const TensorInfo& input,
+ const TensorInfo& output,
+ const BatchToSpaceNdDescriptor& desc) {
+ DataLayout dataLayout = desc.m_DataLayout;
+ const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, dataLayout);
+
+ // ArmNN blockShape is [H, W] Cl asks for W, H
+ int32_t blockHeight = boost::numeric_cast<int32_t>(desc.m_BlockShape[0]);
+ int32_t blockWidth = boost::numeric_cast<int32_t>(desc.m_BlockShape[1]);
+
+ const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, dataLayout);
+
+ const arm_compute::Status aclStatus = arm_compute::CLBatchToSpaceLayer::validate(&aclInputInfo,
+ blockWidth,
+ blockHeight,
+ &aclOutputInfo);
+ return aclStatus;
+}
+
+} //namespace armnn
diff --git a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp
new file mode 100644
index 0000000..4db84a2
--- /dev/null
+++ b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp
@@ -0,0 +1,30 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+#include <arm_compute/runtime/CL/CLFunctions.h>
+
+namespace armnn
+{
+
+arm_compute::Status ClBatchToSpaceNdWorkloadValidate(const TensorInfo& input,
+ const TensorInfo& output,
+ const BatchToSpaceNdDescriptor& desc);
+
+class ClBatchToSpaceNdWorkload : public BaseWorkload<BatchToSpaceNdQueueDescriptor>
+{
+public:
+ ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& descriptor, const WorkloadInfo& info);
+
+ void Execute() const override;
+
+private:
+
+ mutable arm_compute::CLBatchToSpaceLayer m_Layer;
+};
+
+} //namespace armnn
diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp
index eeca403..39ecc53 100644
--- a/src/backends/cl/workloads/ClWorkloads.hpp
+++ b/src/backends/cl/workloads/ClWorkloads.hpp
@@ -8,6 +8,7 @@
#include "ClAdditionWorkload.hpp"
#include "ClConstantWorkload.hpp"
#include "ClBatchNormalizationFloatWorkload.hpp"
+#include "ClBatchToSpaceNdWorkload.hpp"
#include "ClConvolution2dWorkload.hpp"
#include "ClDepthwiseConvolutionWorkload.hpp"
#include "ClDivisionFloatWorkload.hpp"