IVGCVSW-6980 Delegate support for slice operator
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
Change-Id: I90d800160b070e25d999b5102a7ce6d3e0ed6a81
diff --git a/delegate/src/test/SliceTest.cpp b/delegate/src/test/SliceTest.cpp
index bd05849..1d7133f 100644
--- a/delegate/src/test/SliceTest.cpp
+++ b/delegate/src/test/SliceTest.cpp
@@ -1,5 +1,5 @@
//
-// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
@@ -8,236 +8,74 @@
#include <armnn_delegate.hpp>
#include <flatbuffers/flatbuffers.h>
-#include <tensorflow/lite/schema/schema_generated.h>
#include <doctest/doctest.h>
namespace armnnDelegate
{
-void StridedSlice4DTest(std::vector<armnn::BackendId>& backends)
+void SliceFixtureSimpleTest(std::vector<armnn::BackendId>& backends)
{
- std::vector<int32_t> inputShape { 3, 2, 3, 1 };
- std::vector<int32_t> outputShape { 1, 2, 3, 1 };
- std::vector<int32_t> beginShape { 4 };
- std::vector<int32_t> endShape { 4 };
- std::vector<int32_t> strideShape { 4 };
+ std::vector<int32_t> inputShape { 3, 2, 3 };
+ std::vector<int32_t> outputShape { 2, 1, 3 };
+ std::vector<int32_t> beginShape { 3 };
+ std::vector<int32_t> sizeShape { 3 };
- std::vector<int32_t> beginData { 1, 0, 0, 0 };
- std::vector<int32_t> endData { 2, 2, 3, 1 };
- std::vector<int32_t> strideData { 1, 1, 1, 1 };
+ std::vector<int32_t> beginData { 1, 0, 0 };
+ std::vector<int32_t> sizeData { 2, 1, 3 };
std::vector<float> inputData { 1.0f, 1.0f, 1.0f, 2.0f, 2.0f, 2.0f,
3.0f, 3.0f, 3.0f, 4.0f, 4.0f, 4.0f,
5.0f, 5.0f, 5.0f, 6.0f, 6.0f, 6.0f };
- std::vector<float> outputData { 3.0f, 3.0f, 3.0f, 4.0f, 4.0f, 4.0f };
+ std::vector<float> outputData { 3.0f, 3.0f, 3.0f,
+ 5.0f, 5.0f, 5.0f };
- StridedSliceTestImpl<float>(
- backends,
- inputData,
- outputData,
- beginData,
- endData,
- strideData,
- inputShape,
- beginShape,
- endShape,
- strideShape,
- outputShape
- );
+ SliceTestImpl<float>(
+ backends,
+ inputData,
+ outputData,
+ beginData,
+ sizeData,
+ inputShape,
+ beginShape,
+ sizeShape,
+ outputShape);
}
-void StridedSlice4DReverseTest(std::vector<armnn::BackendId>& backends)
-{
- std::vector<int32_t> inputShape { 3, 2, 3, 1 };
- std::vector<int32_t> outputShape { 1, 2, 3, 1 };
- std::vector<int32_t> beginShape { 4 };
- std::vector<int32_t> endShape { 4 };
- std::vector<int32_t> strideShape { 4 };
-
- std::vector<int32_t> beginData { 1, -1, 0, 0 };
- std::vector<int32_t> endData { 2, -3, 3, 1 };
- std::vector<int32_t> strideData { 1, -1, 1, 1 };
- std::vector<float> inputData { 1.0f, 1.0f, 1.0f, 2.0f, 2.0f, 2.0f,
- 3.0f, 3.0f, 3.0f, 4.0f, 4.0f, 4.0f,
- 5.0f, 5.0f, 5.0f, 6.0f, 6.0f, 6.0f };
- std::vector<float> outputData { 4.0f, 4.0f, 4.0f, 3.0f, 3.0f, 3.0f };
-
- StridedSliceTestImpl<float>(
- backends,
- inputData,
- outputData,
- beginData,
- endData,
- strideData,
- inputShape,
- beginShape,
- endShape,
- strideShape,
- outputShape
- );
-}
-
-void StridedSliceSimpleStrideTest(std::vector<armnn::BackendId>& backends)
-{
- std::vector<int32_t> inputShape { 3, 2, 3, 1 };
- std::vector<int32_t> outputShape { 2, 1, 2, 1 };
- std::vector<int32_t> beginShape { 4 };
- std::vector<int32_t> endShape { 4 };
- std::vector<int32_t> strideShape { 4 };
-
- std::vector<int32_t> beginData { 0, 0, 0, 0 };
- std::vector<int32_t> endData { 3, 2, 3, 1 };
- std::vector<int32_t> strideData { 2, 2, 2, 1 };
- std::vector<float> inputData { 1.0f, 1.0f, 1.0f, 2.0f, 2.0f, 2.0f,
- 3.0f, 3.0f, 3.0f, 4.0f, 4.0f, 4.0f,
- 5.0f, 5.0f, 5.0f, 6.0f, 6.0f, 6.0f };
- std::vector<float> outputData { 1.0f, 1.0f,
- 5.0f, 5.0f };
-
- StridedSliceTestImpl<float>(
- backends,
- inputData,
- outputData,
- beginData,
- endData,
- strideData,
- inputShape,
- beginShape,
- endShape,
- strideShape,
- outputShape
- );
-}
-
-void StridedSliceSimpleRangeMaskTest(std::vector<armnn::BackendId>& backends)
-{
- std::vector<int32_t> inputShape { 3, 2, 3, 1 };
- std::vector<int32_t> outputShape { 3, 2, 3, 1 };
- std::vector<int32_t> beginShape { 4 };
- std::vector<int32_t> endShape { 4 };
- std::vector<int32_t> strideShape { 4 };
-
- std::vector<int32_t> beginData { 1, 1, 1, 1 };
- std::vector<int32_t> endData { 1, 1, 1, 1 };
- std::vector<int32_t> strideData { 1, 1, 1, 1 };
-
- int beginMask = -1;
- int endMask = -1;
-
- std::vector<float> inputData { 1.0f, 1.0f, 1.0f, 2.0f, 2.0f, 2.0f,
- 3.0f, 3.0f, 3.0f, 4.0f, 4.0f, 4.0f,
- 5.0f, 5.0f, 5.0f, 6.0f, 6.0f, 6.0f };
- std::vector<float> outputData { 1.0f, 1.0f, 1.0f, 2.0f, 2.0f, 2.0f,
- 3.0f, 3.0f, 3.0f, 4.0f, 4.0f, 4.0f,
- 5.0f, 5.0f, 5.0f, 6.0f, 6.0f, 6.0f };
-
- StridedSliceTestImpl<float>(
- backends,
- inputData,
- outputData,
- beginData,
- endData,
- strideData,
- inputShape,
- beginShape,
- endShape,
- strideShape,
- outputShape,
- beginMask,
- endMask
- );
-}
-
-
-TEST_SUITE("StridedSlice_CpuRefTests")
+TEST_SUITE("Slice_CpuRefTests")
{
-TEST_CASE ("StridedSlice_4D_CpuRef_Test")
+TEST_CASE ("Slice_Simple_CpuRef_Test")
{
std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
- StridedSlice4DTest(backends);
+ SliceFixtureSimpleTest(backends);
}
-TEST_CASE ("StridedSlice_4D_Reverse_CpuRef_Test")
+} // Slice_CpuRefTests TestSuite
+
+
+
+TEST_SUITE("Slice_CpuAccTests")
+{
+
+TEST_CASE ("Slice_Simple_CpuAcc_Test")
{
std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
- StridedSlice4DReverseTest(backends);
+ SliceFixtureSimpleTest(backends);
}
-TEST_CASE ("StridedSlice_SimpleStride_CpuRef_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
- StridedSliceSimpleStrideTest(backends);
-}
-
-TEST_CASE ("StridedSlice_SimpleRange_CpuRef_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
- StridedSliceSimpleRangeMaskTest(backends);
-}
-
-} // StridedSlice_CpuRefTests TestSuite
-
-
-
-TEST_SUITE("StridedSlice_CpuAccTests")
-{
-
-TEST_CASE ("StridedSlice_4D_CpuAcc_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
- StridedSlice4DTest(backends);
-}
-
-TEST_CASE ("StridedSlice_4D_Reverse_CpuAcc_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
- StridedSlice4DReverseTest(backends);
-}
-
-TEST_CASE ("StridedSlice_SimpleStride_CpuAcc_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
- StridedSliceSimpleStrideTest(backends);
-}
-
-TEST_CASE ("StridedSlice_SimpleRange_CpuAcc_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
- StridedSliceSimpleRangeMaskTest(backends);
-}
-
-} // StridedSlice_CpuAccTests TestSuite
+} // Slice_CpuAccTests TestSuite
TEST_SUITE("StridedSlice_GpuAccTests")
{
-TEST_CASE ("StridedSlice_4D_GpuAcc_Test")
+TEST_CASE ("Slice_Simple_GpuAcc_Test")
{
- std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
- StridedSlice4DTest(backends);
+ std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
+ SliceFixtureSimpleTest(backends);
}
-TEST_CASE ("StridedSlice_4D_Reverse_GpuAcc_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
- StridedSlice4DReverseTest(backends);
-}
-
-TEST_CASE ("StridedSlice_SimpleStride_GpuAcc_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
- StridedSliceSimpleStrideTest(backends);
-}
-
-TEST_CASE ("StridedSlice_SimpleRange_GpuAcc_Test")
-{
- std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
- StridedSliceSimpleRangeMaskTest(backends);
-}
-
-} // StridedSlice_GpuAccTests TestSuite
+} // Slice_GpuAccTests TestSuite
} // namespace armnnDelegate
\ No newline at end of file