IVGCVSW-6929 Fix for segfault in tflite delegate
* It's possible that a model may have an input entry for bias tensors
but that the index for those is -1. If it's -1 then it's not present.
* Fixed logic error in IsOptionalOperandPresent: it returned false if
it was present and true if it was missing.
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I45ad8d8552122493c529b1a35a5689416ccfbb71
diff --git a/delegate/src/Convolution.hpp b/delegate/src/Convolution.hpp
index f02a56f..3b23d6d 100644
--- a/delegate/src/Convolution.hpp
+++ b/delegate/src/Convolution.hpp
@@ -35,7 +35,7 @@
armnn::Convolution2dDescriptor descriptor;
const auto params = reinterpret_cast<TfLiteConvParams*>(tfLiteNode->builtin_data);
- bool biasEnabled = tfLiteNode->inputs->size > 2;
+ bool biasEnabled = IsOptionalOperandPresent(tfLiteNode, 2);
descriptor.m_BiasEnabled = biasEnabled;
descriptor.m_StrideX = NonNegative(params->stride_width, nodeIndex);
descriptor.m_StrideY = NonNegative(params->stride_height, nodeIndex);
@@ -225,7 +225,7 @@
armnn::Convolution3dDescriptor descriptor;
const auto params = reinterpret_cast<TfLiteConv3DParams*>(tfLiteNode->builtin_data);
- bool biasEnabled = tfLiteNode->inputs->size == 3 ? true : false;
+ bool biasEnabled = IsOptionalOperandPresent(tfLiteNode, 2);
descriptor.m_BiasEnabled = biasEnabled;
descriptor.m_DataLayout = armnn::DataLayout::NDHWC;
descriptor.m_StrideX = NonNegative(params->stride_width, nodeIndex);
@@ -382,7 +382,7 @@
}
TF_LITE_ENSURE_STATUS(ValidateNumOutputs(tfLiteContext, tfLiteNode, 1, nodeIndex));
- bool biasEnabled = tfLiteNode->inputs->size > 2;
+ bool biasEnabled = IsOptionalOperandPresent(tfLiteNode, 2);
armnn::DepthwiseConvolution2dDescriptor descriptor;
const auto params = reinterpret_cast<TfLiteDepthwiseConvParams*>(tfLiteNode->builtin_data);