commit 91e4c6d43921b735e6aee78d8611bc0372eda4df
author Nikhil Raj <nikhil.raj@arm.com> Fri Jul 05 12:22:58 2019 +0100
committer Matteo Martincigh <matteo.martincigh@arm.com> Fri Jul 05 12:55:51 2019 +0000
tree 0a1cf9d18ba23984c6a66a79cf8105834b00ef55
parent 328d92b84e6bd29906bf1fc496b1103af7f7e115

IVGCVSW-3293 Add CL backend support for PReLU

Change-Id: I1bb187db89bb3eb883b8f0aca4c3439d82b56583
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>

src/backends/cl/workloads/CMakeLists.txt

diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt
index 1b4c85b..40c5f76 100644
--- a/src/backends/cl/workloads/CMakeLists.txt
+++ b/src/backends/cl/workloads/CMakeLists.txt
@@ -54,6 +54,8 @@
     ClPermuteWorkload.hpp
     ClPooling2dWorkload.cpp
     ClPooling2dWorkload.hpp
+    ClPreluWorkload.cpp
+    ClPreluWorkload.hpp
     ClQuantizeWorkload.cpp
     ClQuantizeWorkload.hpp
     ClReshapeWorkload.cpp

src/backends/cl/workloads/ClPreluWorkload.cpp

diff --git a/src/backends/cl/workloads/ClPreluWorkload.cpp b/src/backends/cl/workloads/ClPreluWorkload.cpp
new file mode 100644
index 0000000..1813105
--- /dev/null
+++ b/src/backends/cl/workloads/ClPreluWorkload.cpp
@@ -0,0 +1,48 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClPreluWorkload.hpp"
+#include "ClWorkloadUtils.hpp"
+#include <backendsCommon/CpuTensorHandle.hpp>
+#include <aclCommon/ArmComputeUtils.hpp>
+#include <cl/ClLayerSupport.hpp>
+#include <cl/ClTensorHandle.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status ClPreluWorkloadValidate(const TensorInfo& input,
+                                            const TensorInfo& alpha,
+                                            const TensorInfo& output)
+{
+    const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclAlpha = armcomputetensorutils::BuildArmComputeTensorInfo(alpha);
+    const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+    return arm_compute::CLPReluLayer::validate(&aclInput,
+                                               &aclAlpha,
+                                               &aclOutput);
+}
+
+ClPreluWorkload::ClPreluWorkload(const PreluQueueDescriptor& descriptor,
+                                 const WorkloadInfo& info)
+    : BaseWorkload<PreluQueueDescriptor>(descriptor, info)
+{
+    m_Data.ValidateInputsOutputs("ClPreluWorkload", 1, 1);
+
+    arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ICLTensor& alpha = static_cast<IClTensorHandle*>(m_Data.m_Inputs[1])->GetTensor();
+    arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+    m_PreluLayer.configure(&input, &alpha, &output);
+}
+
+void ClPreluWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_CL("ClPreluWorkload_Execute");
+    RunClFunction(m_PreluLayer, CHECK_LOCATION());
+}
+
+} //namespace armnn

src/backends/cl/workloads/ClPreluWorkload.hpp

diff --git a/src/backends/cl/workloads/ClPreluWorkload.hpp b/src/backends/cl/workloads/ClPreluWorkload.hpp
new file mode 100644
index 0000000..6ffe4ca
--- /dev/null
+++ b/src/backends/cl/workloads/ClPreluWorkload.hpp
@@ -0,0 +1,28 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/runtime/CL/CLFunctions.h>
+
+namespace armnn
+{
+arm_compute::Status ClPreluWorkloadValidate(const TensorInfo& input,
+                                            const TensorInfo& alpha,
+                                            const TensorInfo& output);
+
+class ClPreluWorkload : public BaseWorkload<PreluQueueDescriptor>
+{
+public:
+    ClPreluWorkload(const PreluQueueDescriptor& descriptor, const WorkloadInfo& info);
+    void Execute() const override;
+
+private:
+    mutable arm_compute::CLPReluLayer m_PreluLayer;
+};
+
+} //namespace armnn

src/backends/cl/workloads/ClWorkloads.hpp

diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp
index e82afc5..6ba8138 100644
--- a/src/backends/cl/workloads/ClWorkloads.hpp
+++ b/src/backends/cl/workloads/ClWorkloads.hpp
@@ -27,6 +27,7 @@
 #include "ClPermuteWorkload.hpp"
 #include "ClPadWorkload.hpp"
 #include "ClPooling2dWorkload.hpp"
+#include "ClPreluWorkload.hpp"
 #include "ClQuantizeWorkload.hpp"
 #include "ClReshapeWorkload.hpp"
 #include "ClResizeBilinearFloatWorkload.hpp"