IVGCVSW-3728 Add CL workload for Slice

Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I2ed38744e1e8c839b369be8d44c0cffccfeb370e
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt
index c844512..de62ca9 100644
--- a/src/backends/cl/workloads/CMakeLists.txt
+++ b/src/backends/cl/workloads/CMakeLists.txt
@@ -74,6 +74,8 @@
     ClResizeWorkload.hpp
     ClRsqrtWorkload.cpp
     ClRsqrtWorkload.hpp
+    ClSliceWorkload.cpp
+    ClSliceWorkload.hpp
     ClSoftmaxBaseWorkload.cpp
     ClSoftmaxBaseWorkload.hpp
     ClSoftmaxFloatWorkload.cpp
diff --git a/src/backends/cl/workloads/ClSliceWorkload.cpp b/src/backends/cl/workloads/ClSliceWorkload.cpp
new file mode 100644
index 0000000..fa99e7f
--- /dev/null
+++ b/src/backends/cl/workloads/ClSliceWorkload.cpp
@@ -0,0 +1,56 @@
+//
+// Copyright © 2019 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClSliceWorkload.hpp"
+
+#include "ClWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+
+#include <cl/ClTensorHandle.hpp>
+
+#include <boost/cast.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status ClSliceWorkloadValidate(const TensorInfo& input,
+                                            const TensorInfo& output,
+                                            const SliceDescriptor& descriptor)
+{
+    const arm_compute::TensorInfo aclInput  = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+    arm_compute::Coordinates starts;
+    arm_compute::Coordinates ends;
+
+    std::tie(starts, ends) = SetClSliceData(descriptor.m_Begin, descriptor.m_Size);
+
+    return arm_compute::CLSlice::validate(&aclInput, &aclOutput, starts, ends);
+}
+
+ClSliceWorkload::ClSliceWorkload(const SliceQueueDescriptor& descriptor, const WorkloadInfo& info)
+    : BaseWorkload<SliceQueueDescriptor>(descriptor, info)
+{
+    m_Data.ValidateInputsOutputs("ClSliceWorkload", 1, 1);
+
+    arm_compute::ICLTensor& input  = boost::polymorphic_downcast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+    arm_compute::ICLTensor& output = boost::polymorphic_downcast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+    arm_compute::Coordinates starts;
+    arm_compute::Coordinates ends;
+
+    std::tie(starts, ends) = SetClSliceData(m_Data.m_Parameters.m_Begin, m_Data.m_Parameters.m_Size);
+
+    m_SliceFunction.configure(&input, &output, starts, ends);
+}
+
+void ClSliceWorkload::Execute() const
+{
+    ARMNN_SCOPED_PROFILING_EVENT_CL("ClSliceWorkload_Execute");
+    RunClFunction(m_SliceFunction, CHECK_LOCATION());
+}
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClSliceWorkload.hpp b/src/backends/cl/workloads/ClSliceWorkload.hpp
new file mode 100644
index 0000000..3460b77
--- /dev/null
+++ b/src/backends/cl/workloads/ClSliceWorkload.hpp
@@ -0,0 +1,30 @@
+//
+// Copyright © 2019 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/core/Error.h>
+#include <arm_compute/runtime/CL/functions/CLSlice.h>
+
+namespace armnn
+{
+
+arm_compute::Status ClSliceWorkloadValidate(const TensorInfo& input,
+                                            const TensorInfo& output,
+                                            const SliceDescriptor& descriptor);
+
+class ClSliceWorkload : public BaseWorkload<SliceQueueDescriptor>
+{
+public:
+    ClSliceWorkload(const SliceQueueDescriptor& descriptor, const WorkloadInfo& info);
+    virtual void Execute() const override;
+
+private:
+    mutable arm_compute::CLSlice m_SliceFunction;
+};
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClWorkloadUtils.hpp b/src/backends/cl/workloads/ClWorkloadUtils.hpp
index 32dacdf..f5e60e6 100644
--- a/src/backends/cl/workloads/ClWorkloadUtils.hpp
+++ b/src/backends/cl/workloads/ClWorkloadUtils.hpp
@@ -60,6 +60,30 @@
     return std::make_tuple(starts, ends, strides);
 }
 
+inline auto SetClSliceData(const std::vector<unsigned int>& m_begin,
+                           const std::vector<unsigned int>& m_size)
+{
+    // This function must translate the size vector given to an end vector
+    // expected by the ACL NESlice workload
+    arm_compute::Coordinates starts;
+    arm_compute::Coordinates ends;
+
+    unsigned int num_dims = static_cast<unsigned int>(m_begin.size());
+
+    // For strided slices, we have the relationship size = (end - begin) / stride
+    // For slice, we assume stride to be a vector of all ones, yielding the formula
+    // size = (end - begin) therefore we know end = size + begin
+    for (unsigned int i = 0; i < num_dims; i++)
+    {
+        unsigned int revertedIndex = num_dims - i - 1;
+
+        starts.set(i, static_cast<int>(m_begin[revertedIndex]));
+        ends.set(i, static_cast<int>(m_begin[revertedIndex] + m_size[revertedIndex]));
+    }
+
+    return std::make_tuple(starts, ends);
+}
+
 inline void InitializeArmComputeClTensorData(arm_compute::CLTensor& clTensor,
                                              const ConstCpuTensorHandle* handle)
 {
diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp
index dd8c699..014dc3f 100644
--- a/src/backends/cl/workloads/ClWorkloads.hpp
+++ b/src/backends/cl/workloads/ClWorkloads.hpp
@@ -37,6 +37,7 @@
 #include "ClReshapeWorkload.hpp"
 #include "ClResizeWorkload.hpp"
 #include "ClRsqrtWorkload.hpp"
+#include "ClSliceWorkload.hpp"
 #include "ClSoftmaxFloatWorkload.hpp"
 #include "ClSoftmaxUint8Workload.hpp"
 #include "ClSpaceToBatchNdWorkload.hpp"