IVGCVSW-6683-6684 Add ClBaseWorkload and NeonBaseWorkload
* Neon/Cl Activation workloads inherit from Cl/Neon BaseWorkload
* Unit Test for ReplaceTensorHandle functions
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I985e34b93a96405735402a6d3b947957afbe2857
diff --git a/src/backends/neon/workloads/NeonActivationWorkload.cpp b/src/backends/neon/workloads/NeonActivationWorkload.cpp
index dd4c97d..0fadc12 100644
--- a/src/backends/neon/workloads/NeonActivationWorkload.cpp
+++ b/src/backends/neon/workloads/NeonActivationWorkload.cpp
@@ -1,5 +1,5 @@
//
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
@@ -31,7 +31,7 @@
NeonActivationWorkload::NeonActivationWorkload(const ActivationQueueDescriptor& descriptor,
const WorkloadInfo& info)
- : BaseWorkload<ActivationQueueDescriptor>(descriptor, info)
+ : NeonBaseWorkload<ActivationQueueDescriptor>(descriptor, info)
{
// Report Profiling Details
ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonActivationWorkload_Construct",
diff --git a/src/backends/neon/workloads/NeonActivationWorkload.hpp b/src/backends/neon/workloads/NeonActivationWorkload.hpp
index c3d6cc1..72ad477 100644
--- a/src/backends/neon/workloads/NeonActivationWorkload.hpp
+++ b/src/backends/neon/workloads/NeonActivationWorkload.hpp
@@ -1,23 +1,22 @@
//
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
#pragma once
-#include <armnn/backends/Workload.hpp>
+#include "NeonBaseWorkload.hpp"
#include <arm_compute/core/Error.h>
#include <arm_compute/runtime/IFunction.h>
namespace armnn
{
-
arm_compute::Status NeonActivationWorkloadValidate(const TensorInfo& input,
const TensorInfo& output,
const ActivationDescriptor& descriptor);
-class NeonActivationWorkload : public BaseWorkload<ActivationQueueDescriptor>
+class NeonActivationWorkload : public NeonBaseWorkload<ActivationQueueDescriptor>
{
public:
NeonActivationWorkload(const ActivationQueueDescriptor& descriptor, const WorkloadInfo& info);
diff --git a/src/backends/neon/workloads/NeonBaseWorkload.hpp b/src/backends/neon/workloads/NeonBaseWorkload.hpp
new file mode 100644
index 0000000..a92f35a
--- /dev/null
+++ b/src/backends/neon/workloads/NeonBaseWorkload.hpp
@@ -0,0 +1,40 @@
+//
+// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <armnn/backends/Workload.hpp>
+
+namespace armnn
+{
+template <typename QueueDescriptor>
+class NeonBaseWorkload : public BaseWorkload<QueueDescriptor>
+{
+public:
+ NeonBaseWorkload(const QueueDescriptor& descriptor, const WorkloadInfo& info)
+ : BaseWorkload<QueueDescriptor>(descriptor, info)
+ {}
+
+ // Replace input tensor handle with the given TensorHandle and call Reconfigure()
+ void ReplaceInputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
+ {
+ this->m_Data.m_Inputs[slot] = tensorHandle;
+ Reconfigure();
+ }
+
+ // Replace output tensor handle with the given TensorHandle and call Reconfigure()
+ void ReplaceOutputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
+ {
+ this->m_Data.m_Outputs[slot] = tensorHandle;
+ Reconfigure();
+ }
+
+ // Reconfigure the workload configuration. Throw armnn::UnimplementedException by default.
+ virtual void Reconfigure()
+ {
+ throw armnn::UnimplementedException("Reconfigure not implemented for this workload");
+ }
+};
+} //namespace armnn