IVGCVSW-4200 Add CL EXP Workload
IVGCVSW-4203 Add Neon EXP Workload
* Added CL EXP operator workload
* Added EXP test suite
* Enabled EXP tests on ACL and Ref
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I793d31af1b2e3fe86b0bec6d9e5de503c5dab970
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt
index 6d0aa79..7d9df07 100644
--- a/src/backends/cl/workloads/CMakeLists.txt
+++ b/src/backends/cl/workloads/CMakeLists.txt
@@ -36,6 +36,8 @@
ClDequantizeWorkload.hpp
ClDivisionFloatWorkload.cpp
ClDivisionFloatWorkload.hpp
+ ClExpWorkload.cpp
+ ClExpWorkload.hpp
ClFloorFloatWorkload.cpp
ClFloorFloatWorkload.hpp
ClFullyConnectedWorkload.cpp
diff --git a/src/backends/cl/workloads/ClExpWorkload.cpp b/src/backends/cl/workloads/ClExpWorkload.cpp
new file mode 100644
index 0000000..5b5e0a5
--- /dev/null
+++ b/src/backends/cl/workloads/ClExpWorkload.cpp
@@ -0,0 +1,45 @@
+//
+// Copyright © 2020 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClExpWorkload.hpp"
+
+#include "ClWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+#include <armnn/utility/PolymorphicDowncast.hpp>
+
+#include <cl/ClTensorHandle.hpp>
+
+#include <boost/cast.hpp>
+
+namespace armnn
+{
+
+arm_compute::Status ClExpWorkloadValidate(const TensorInfo& input, const TensorInfo& output)
+{
+ const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+ const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
+ return arm_compute::CLExpLayer::validate(&aclInput, &aclOutput);
+}
+
+ClExpWorkload::ClExpWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info)
+ : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info)
+{
+ m_Data.ValidateInputsOutputs("ClExpWorkload", 1, 1);
+
+ arm_compute::ICLTensor& input = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+ arm_compute::ICLTensor& output = PolymorphicDowncast<ClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+ m_ExpLayer.configure(&input, &output);
+}
+
+void ClExpWorkload::Execute() const
+{
+ ARMNN_SCOPED_PROFILING_EVENT_CL("ClExpWorkload_Execute");
+ RunClFunction(m_ExpLayer, CHECK_LOCATION());
+}
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClExpWorkload.hpp b/src/backends/cl/workloads/ClExpWorkload.hpp
new file mode 100644
index 0000000..c35aebb
--- /dev/null
+++ b/src/backends/cl/workloads/ClExpWorkload.hpp
@@ -0,0 +1,28 @@
+//
+// Copyright © 2020 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/core/Error.h>
+#include <arm_compute/runtime/CL/functions/CLElementWiseUnaryLayer.h>
+
+namespace armnn
+{
+
+arm_compute::Status ClExpWorkloadValidate(const TensorInfo& input, const TensorInfo& output);
+
+class ClExpWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor>
+{
+public:
+ ClExpWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info);
+ virtual void Execute() const override;
+
+private:
+ mutable arm_compute::CLExpLayer m_ExpLayer;
+};
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp
index 7b3ce43..1ae9a91 100644
--- a/src/backends/cl/workloads/ClWorkloads.hpp
+++ b/src/backends/cl/workloads/ClWorkloads.hpp
@@ -17,6 +17,7 @@
#include "ClDepthwiseConvolutionWorkload.hpp"
#include "ClDequantizeWorkload.hpp"
#include "ClDivisionFloatWorkload.hpp"
+#include "ClExpWorkload.hpp"
#include "ClFloorFloatWorkload.hpp"
#include "ClFullyConnectedWorkload.hpp"
#include "ClInstanceNormalizationWorkload.hpp"