Updating Doxygen documentation for 20.05 release.
Change-Id: I4d624343ed5fd6ae269c3d53532903084508fd14
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
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+<div class="title">RefConstantWorkload.cpp</div> </div>
+</div><!--header-->
+<div class="contents">
+<a href="_ref_constant_workload_8cpp.xhtml">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span> <span class="comment">//</span></div><div class="line"><a name="l00002"></a><span class="lineno"> 2</span> <span class="comment">// Copyright © 2017 Arm Ltd. All rights reserved.</span></div><div class="line"><a name="l00003"></a><span class="lineno"> 3</span> <span class="comment">// SPDX-License-Identifier: MIT</span></div><div class="line"><a name="l00004"></a><span class="lineno"> 4</span> <span class="comment">//</span></div><div class="line"><a name="l00005"></a><span class="lineno"> 5</span> </div><div class="line"><a name="l00006"></a><span class="lineno"> 6</span> <span class="preprocessor">#include "<a class="code" href="_ref_constant_workload_8hpp.xhtml">RefConstantWorkload.hpp</a>"</span></div><div class="line"><a name="l00007"></a><span class="lineno"> 7</span> </div><div class="line"><a name="l00008"></a><span class="lineno"> 8</span> <span class="preprocessor">#include "<a class="code" href="_ref_workload_utils_8hpp.xhtml">RefWorkloadUtils.hpp</a>"</span></div><div class="line"><a name="l00009"></a><span class="lineno"> 9</span> </div><div class="line"><a name="l00010"></a><span class="lineno"> 10</span> <span class="preprocessor">#include <<a class="code" href="_types_8hpp.xhtml">armnn/Types.hpp</a>></span></div><div class="line"><a name="l00011"></a><span class="lineno"> 11</span> </div><div class="line"><a name="l00012"></a><span class="lineno"> 12</span> <span class="preprocessor">#include <<a class="code" href="_assert_8hpp.xhtml">armnn/utility/Assert.hpp</a>></span></div><div class="line"><a name="l00013"></a><span class="lineno"> 13</span> </div><div class="line"><a name="l00014"></a><span class="lineno"> 14</span> <span class="preprocessor">#include <cstring></span></div><div class="line"><a name="l00015"></a><span class="lineno"> 15</span> </div><div class="line"><a name="l00016"></a><span class="lineno"> 16</span> <span class="keyword">namespace </span><a class="code" href="namespacearmnn.xhtml">armnn</a></div><div class="line"><a name="l00017"></a><span class="lineno"> 17</span> {</div><div class="line"><a name="l00018"></a><span class="lineno"> 18</span> </div><div class="line"><a name="l00019"></a><span class="lineno"><a class="line" href="classarmnn_1_1_ref_constant_workload.xhtml#a7ff5467163733c771493c47382e49abc"> 19</a></span> <a class="code" href="classarmnn_1_1_ref_constant_workload.xhtml#a7ff5467163733c771493c47382e49abc">RefConstantWorkload::RefConstantWorkload</a>(</div><div class="line"><a name="l00020"></a><span class="lineno"> 20</span>  <span class="keyword">const</span> <a class="code" href="structarmnn_1_1_constant_queue_descriptor.xhtml">ConstantQueueDescriptor</a>& descriptor, <span class="keyword">const</span> <a class="code" href="structarmnn_1_1_workload_info.xhtml">WorkloadInfo</a>& info)</div><div class="line"><a name="l00021"></a><span class="lineno"> 21</span>  : <a class="code" href="classarmnn_1_1_base_workload.xhtml">BaseWorkload</a><<a class="code" href="structarmnn_1_1_constant_queue_descriptor.xhtml">ConstantQueueDescriptor</a>>(descriptor, info) {}</div><div class="line"><a name="l00022"></a><span class="lineno"> 22</span> </div><div class="line"><a name="l00023"></a><span class="lineno"><a class="line" href="classarmnn_1_1_ref_constant_workload.xhtml#a81627f96ba06d76e147f7d392a8117ed"> 23</a></span> <span class="keywordtype">void</span> <a class="code" href="classarmnn_1_1_ref_constant_workload.xhtml#a81627f96ba06d76e147f7d392a8117ed">RefConstantWorkload::PostAllocationConfigure</a>()</div><div class="line"><a name="l00024"></a><span class="lineno"> 24</span> {</div><div class="line"><a name="l00025"></a><span class="lineno"> 25</span>  <span class="keyword">const</span> <a class="code" href="structarmnn_1_1_constant_queue_descriptor.xhtml">ConstantQueueDescriptor</a>& data = this-><a class="code" href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">m_Data</a>;</div><div class="line"><a name="l00026"></a><span class="lineno"> 26</span> </div><div class="line"><a name="l00027"></a><span class="lineno"> 27</span>  <a class="code" href="_assert_8hpp.xhtml#a5698be69cbd5dfe6c28fcd9867e8cbed">ARMNN_ASSERT</a>(data.<a class="code" href="structarmnn_1_1_constant_queue_descriptor.xhtml#ade37258f293ac919eac5f1af1de5ac82">m_LayerOutput</a> != <span class="keyword">nullptr</span>);</div><div class="line"><a name="l00028"></a><span class="lineno"> 28</span> </div><div class="line"><a name="l00029"></a><span class="lineno"> 29</span>  <span class="keyword">const</span> <a class="code" href="classarmnn_1_1_tensor_info.xhtml">TensorInfo</a>& outputInfo = <a class="code" href="namespacearmnn.xhtml#a93d269806f34407695dc10f510001c30">GetTensorInfo</a>(data.<a class="code" href="structarmnn_1_1_queue_descriptor.xhtml#a6abd491bb99ffe88bd472c1ae5a1ed1a">m_Outputs</a>[0]);</div><div class="line"><a name="l00030"></a><span class="lineno"> 30</span>  <a class="code" href="_assert_8hpp.xhtml#a5698be69cbd5dfe6c28fcd9867e8cbed">ARMNN_ASSERT</a>(data.<a class="code" href="structarmnn_1_1_constant_queue_descriptor.xhtml#ade37258f293ac919eac5f1af1de5ac82">m_LayerOutput</a>-><a class="code" href="classarmnn_1_1_const_cpu_tensor_handle.xhtml#a66e8f43a5b42b500871ed96e15419567">GetTensorInfo</a>().<a class="code" href="classarmnn_1_1_tensor_info.xhtml#abcbdfb544ece4c31d0b37715ad0f3be0">GetNumBytes</a>() == outputInfo.<a class="code" href="classarmnn_1_1_tensor_info.xhtml#abcbdfb544ece4c31d0b37715ad0f3be0">GetNumBytes</a>());</div><div class="line"><a name="l00031"></a><span class="lineno"> 31</span> </div><div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  memcpy(GetOutputTensorData<void>(0, data), data.<a class="code" href="structarmnn_1_1_constant_queue_descriptor.xhtml#ade37258f293ac919eac5f1af1de5ac82">m_LayerOutput</a>-><a class="code" href="classarmnn_1_1_const_cpu_tensor_handle.xhtml#a3a76fc8b348e13d5a6ac1240c96ebef4">GetConstTensor</a><<span class="keywordtype">void</span>>(),</div><div class="line"><a name="l00033"></a><span class="lineno"> 33</span>  outputInfo.<a class="code" href="classarmnn_1_1_tensor_info.xhtml#abcbdfb544ece4c31d0b37715ad0f3be0">GetNumBytes</a>());</div><div class="line"><a name="l00034"></a><span class="lineno"> 34</span> }</div><div class="line"><a name="l00035"></a><span class="lineno"> 35</span> </div><div class="line"><a name="l00036"></a><span class="lineno"><a class="line" href="classarmnn_1_1_ref_constant_workload.xhtml#ae071e8822437c78baea75c3aef3a263a"> 36</a></span> <span class="keywordtype">void</span> <a class="code" href="classarmnn_1_1_ref_constant_workload.xhtml#ae071e8822437c78baea75c3aef3a263a">RefConstantWorkload::Execute</a>()<span class="keyword"> const</span></div><div class="line"><a name="l00037"></a><span class="lineno"> 37</span> <span class="keyword"></span>{</div><div class="line"><a name="l00038"></a><span class="lineno"> 38</span>  <a class="code" href="_profiling_8hpp.xhtml#a5ccc65e2c464ac05ce311fdae7ede03a">ARMNN_SCOPED_PROFILING_EVENT</a>(<a class="code" href="namespacearmnn.xhtml#ae2f04a162585c0a5222a537efd5456aea83c2c4e9b658ccafbcbe6309c5d84c64">Compute::CpuRef</a>, <span class="stringliteral">"RefConstantWorkload_Execute"</span>);</div><div class="line"><a name="l00039"></a><span class="lineno"> 39</span> }</div><div class="line"><a name="l00040"></a><span class="lineno"> 40</span> </div><div class="line"><a name="l00041"></a><span class="lineno"> 41</span> } <span class="comment">//namespace armnn</span></div><div class="ttc" id="namespacearmnn_xhtml_ae2f04a162585c0a5222a537efd5456aea83c2c4e9b658ccafbcbe6309c5d84c64"><div class="ttname"><a href="namespacearmnn.xhtml#ae2f04a162585c0a5222a537efd5456aea83c2c4e9b658ccafbcbe6309c5d84c64">armnn::Compute::CpuRef</a></div><div class="ttdoc">CPU Execution: Reference C++ kernels. </div></div>
+<div class="ttc" id="structarmnn_1_1_constant_queue_descriptor_xhtml"><div class="ttname"><a href="structarmnn_1_1_constant_queue_descriptor.xhtml">armnn::ConstantQueueDescriptor</a></div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.xhtml#l00326">WorkloadData.hpp:326</a></div></div>
+<div class="ttc" id="_ref_workload_utils_8hpp_xhtml"><div class="ttname"><a href="_ref_workload_utils_8hpp.xhtml">RefWorkloadUtils.hpp</a></div></div>
+<div class="ttc" id="classarmnn_1_1_tensor_info_xhtml"><div class="ttname"><a href="classarmnn_1_1_tensor_info.xhtml">armnn::TensorInfo</a></div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8hpp_source.xhtml#l00053">Tensor.hpp:53</a></div></div>
+<div class="ttc" id="_ref_constant_workload_8hpp_xhtml"><div class="ttname"><a href="_ref_constant_workload_8hpp.xhtml">RefConstantWorkload.hpp</a></div></div>
+<div class="ttc" id="classarmnn_1_1_base_workload_xhtml_a0a487c549c63319505095b855ea3c195"><div class="ttname"><a href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">armnn::BaseWorkload< ConstantQueueDescriptor >::m_Data</a></div><div class="ttdeci">const ConstantQueueDescriptor m_Data</div><div class="ttdef"><b>Definition:</b> <a href="_workload_8hpp_source.xhtml#l00046">Workload.hpp:46</a></div></div>
+<div class="ttc" id="classarmnn_1_1_tensor_info_xhtml_abcbdfb544ece4c31d0b37715ad0f3be0"><div class="ttname"><a href="classarmnn_1_1_tensor_info.xhtml#abcbdfb544ece4c31d0b37715ad0f3be0">armnn::TensorInfo::GetNumBytes</a></div><div class="ttdeci">unsigned int GetNumBytes() const</div><div class="ttdef"><b>Definition:</b> <a href="_tensor_8cpp_source.xhtml#l00214">Tensor.cpp:214</a></div></div>
+<div class="ttc" id="structarmnn_1_1_constant_queue_descriptor_xhtml_ade37258f293ac919eac5f1af1de5ac82"><div class="ttname"><a href="structarmnn_1_1_constant_queue_descriptor.xhtml#ade37258f293ac919eac5f1af1de5ac82">armnn::ConstantQueueDescriptor::m_LayerOutput</a></div><div class="ttdeci">const ConstCpuTensorHandle * m_LayerOutput</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.xhtml#l00333">WorkloadData.hpp:333</a></div></div>
+<div class="ttc" id="namespacearmnn_xhtml_a93d269806f34407695dc10f510001c30"><div class="ttname"><a href="namespacearmnn.xhtml#a93d269806f34407695dc10f510001c30">armnn::GetTensorInfo</a></div><div class="ttdeci">const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)</div><div class="ttdoc">float32 helpers </div><div class="ttdef"><b>Definition:</b> <a href="_ref_workload_utils_8hpp_source.xhtml#l00026">RefWorkloadUtils.hpp:26</a></div></div>
+<div class="ttc" id="classarmnn_1_1_const_cpu_tensor_handle_xhtml_a3a76fc8b348e13d5a6ac1240c96ebef4"><div class="ttname"><a href="classarmnn_1_1_const_cpu_tensor_handle.xhtml#a3a76fc8b348e13d5a6ac1240c96ebef4">armnn::ConstCpuTensorHandle::GetConstTensor</a></div><div class="ttdeci">const T * GetConstTensor() const</div><div class="ttdef"><b>Definition:</b> <a href="_cpu_tensor_handle_8hpp_source.xhtml#l00031">CpuTensorHandle.hpp:31</a></div></div>
+<div class="ttc" id="namespacearmnn_xhtml"><div class="ttname"><a href="namespacearmnn.xhtml">armnn</a></div><div class="ttdoc">Copyright (c) 2020 ARM Limited. </div><div class="ttdef"><b>Definition:</b> <a href="00__introduction_8dox_source.xhtml#l00025">00_introduction.dox:25</a></div></div>
+<div class="ttc" id="_profiling_8hpp_xhtml_a5ccc65e2c464ac05ce311fdae7ede03a"><div class="ttname"><a href="_profiling_8hpp.xhtml#a5ccc65e2c464ac05ce311fdae7ede03a">ARMNN_SCOPED_PROFILING_EVENT</a></div><div class="ttdeci">#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)</div><div class="ttdef"><b>Definition:</b> <a href="_profiling_8hpp_source.xhtml#l00169">Profiling.hpp:169</a></div></div>
+<div class="ttc" id="classarmnn_1_1_ref_constant_workload_xhtml_a81627f96ba06d76e147f7d392a8117ed"><div class="ttname"><a href="classarmnn_1_1_ref_constant_workload.xhtml#a81627f96ba06d76e147f7d392a8117ed">armnn::RefConstantWorkload::PostAllocationConfigure</a></div><div class="ttdeci">void PostAllocationConfigure() override</div><div class="ttdef"><b>Definition:</b> <a href="_ref_constant_workload_8cpp_source.xhtml#l00023">RefConstantWorkload.cpp:23</a></div></div>
+<div class="ttc" id="classarmnn_1_1_base_workload_xhtml"><div class="ttname"><a href="classarmnn_1_1_base_workload.xhtml">armnn::BaseWorkload</a></div><div class="ttdef"><b>Definition:</b> <a href="_workload_8hpp_source.xhtml#l00028">Workload.hpp:28</a></div></div>
+<div class="ttc" id="_types_8hpp_xhtml"><div class="ttname"><a href="_types_8hpp.xhtml">Types.hpp</a></div></div>
+<div class="ttc" id="_assert_8hpp_xhtml_a5698be69cbd5dfe6c28fcd9867e8cbed"><div class="ttname"><a href="_assert_8hpp.xhtml#a5698be69cbd5dfe6c28fcd9867e8cbed">ARMNN_ASSERT</a></div><div class="ttdeci">#define ARMNN_ASSERT(COND)</div><div class="ttdef"><b>Definition:</b> <a href="_assert_8hpp_source.xhtml#l00014">Assert.hpp:14</a></div></div>
+<div class="ttc" id="classarmnn_1_1_ref_constant_workload_xhtml_ae071e8822437c78baea75c3aef3a263a"><div class="ttname"><a href="classarmnn_1_1_ref_constant_workload.xhtml#ae071e8822437c78baea75c3aef3a263a">armnn::RefConstantWorkload::Execute</a></div><div class="ttdeci">virtual void Execute() const override</div><div class="ttdef"><b>Definition:</b> <a href="_ref_constant_workload_8cpp_source.xhtml#l00036">RefConstantWorkload.cpp:36</a></div></div>
+<div class="ttc" id="_assert_8hpp_xhtml"><div class="ttname"><a href="_assert_8hpp.xhtml">Assert.hpp</a></div></div>
+<div class="ttc" id="structarmnn_1_1_queue_descriptor_xhtml_a6abd491bb99ffe88bd472c1ae5a1ed1a"><div class="ttname"><a href="structarmnn_1_1_queue_descriptor.xhtml#a6abd491bb99ffe88bd472c1ae5a1ed1a">armnn::QueueDescriptor::m_Outputs</a></div><div class="ttdeci">std::vector< ITensorHandle * > m_Outputs</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.xhtml#l00031">WorkloadData.hpp:31</a></div></div>
+<div class="ttc" id="classarmnn_1_1_ref_constant_workload_xhtml_a7ff5467163733c771493c47382e49abc"><div class="ttname"><a href="classarmnn_1_1_ref_constant_workload.xhtml#a7ff5467163733c771493c47382e49abc">armnn::RefConstantWorkload::RefConstantWorkload</a></div><div class="ttdeci">RefConstantWorkload(const ConstantQueueDescriptor &descriptor, const WorkloadInfo &info)</div><div class="ttdef"><b>Definition:</b> <a href="_ref_constant_workload_8cpp_source.xhtml#l00019">RefConstantWorkload.cpp:19</a></div></div>
+<div class="ttc" id="structarmnn_1_1_workload_info_xhtml"><div class="ttname"><a href="structarmnn_1_1_workload_info.xhtml">armnn::WorkloadInfo</a></div><div class="ttdoc">Contains information about inputs and outputs to a layer. </div><div class="ttdef"><b>Definition:</b> <a href="include_2armnn_2backends_2_workload_info_8hpp_source.xhtml#l00016">WorkloadInfo.hpp:16</a></div></div>
+<div class="ttc" id="classarmnn_1_1_const_cpu_tensor_handle_xhtml_a66e8f43a5b42b500871ed96e15419567"><div class="ttname"><a href="classarmnn_1_1_const_cpu_tensor_handle.xhtml#a66e8f43a5b42b500871ed96e15419567">armnn::ConstCpuTensorHandle::GetTensorInfo</a></div><div class="ttdeci">const TensorInfo & GetTensorInfo() const</div><div class="ttdef"><b>Definition:</b> <a href="_cpu_tensor_handle_8hpp_source.xhtml#l00037">CpuTensorHandle.hpp:37</a></div></div>
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