IVGCVSW-5787 Add/Update Execute() implementations in RefActivationWorkload
* Added multithreaded StridedSliceEndToEndTest
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I4579db7b5959e0a22256f1bda00238c22e611dec
diff --git a/src/backends/reference/workloads/RefTransposeWorkload.cpp b/src/backends/reference/workloads/RefTransposeWorkload.cpp
index cc7a555..828badd 100644
--- a/src/backends/reference/workloads/RefTransposeWorkload.cpp
+++ b/src/backends/reference/workloads/RefTransposeWorkload.cpp
@@ -16,12 +16,25 @@
template <armnn::DataType DataType>
void RefTransposeWorkload<DataType>::Execute() const
{
+ Execute(m_Data.m_Inputs, m_Data.m_Outputs);
+}
+
+template <armnn::DataType DataType>
+void RefTransposeWorkload<DataType>::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor)
+{
+ Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs);
+}
+
+template <armnn::DataType DataType>
+void RefTransposeWorkload<DataType>::Execute(std::vector<ITensorHandle*> inputs,
+ std::vector<ITensorHandle*> outputs) const
+{
using T = ResolveType<DataType>;
ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, GetName() + "_Execute");
- const ITensorHandle* src = m_Data.m_Inputs[0];
- ITensorHandle* dst = m_Data.m_Outputs[0];
+ const ITensorHandle* src = inputs[0];
+ ITensorHandle* dst = outputs[0];
const PermutationVector& mappings = m_Data.m_Parameters.m_DimMappings;
armnnUtils::Transpose(GetTensorInfo(src).GetShape(), mappings, src->Map(), dst->Map(), sizeof(T));