commit bcd860a30eba22bb2ba0943ad705734ce0ec5b23
author Keith Davis <keith.davis@arm.com> Thu Aug 05 14:20:33 2021 +0100
committer Matthew Sloyan <matthew.sloyan@arm.com> Tue Aug 10 13:51:31 2021 +0000
tree a54dc121df65036f1604389684c76cdd2c988a4a
parent 2d0679f33f75c43e7169fe0f0ee2d15d0620e091

IVGCVSW-6249 Add ProfilingDetails Macros to all workloads in CL

Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I92dd410da7ad633a46d025fdc2b26093041c439b

src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp

diff --git a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp
index b9736db..8eef587 100644
--- a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp
+++ b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp
@@ -17,11 +17,17 @@
 {
 using namespace armcomputetensorutils;
 
-ClBatchToSpaceNdWorkload::ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& desc,
+ClBatchToSpaceNdWorkload::ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& descriptor,
                                                    const WorkloadInfo& info,
                                                    const arm_compute::CLCompileContext& clCompileContext)
-   : BaseWorkload<BatchToSpaceNdQueueDescriptor>(desc, info)
+    : BaseWorkload<BatchToSpaceNdQueueDescriptor>(descriptor, info)
 {
+    // Report Profiling Details
+    ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClBatchToSpaceWorkload_Construct",
+                                         descriptor.m_Parameters,
+                                         info,
+                                         this->GetGuid());
+
     m_Data.ValidateInputsOutputs("ClBatchToSpaceNdWorkload", 1, 1);
 
     arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout);
@@ -30,8 +36,8 @@
     input.info()->set_data_layout(aclDataLayout);
 
     // ArmNN blockShape is [H, W] Cl asks for W, H
-    int32_t blockHeight = armnn::numeric_cast<int32_t>(desc.m_Parameters.m_BlockShape[0]);
-    int32_t blockWidth = armnn::numeric_cast<int32_t>(desc.m_Parameters.m_BlockShape[1]);
+    int32_t blockHeight = armnn::numeric_cast<int32_t>(descriptor.m_Parameters.m_BlockShape[0]);
+    int32_t blockWidth = armnn::numeric_cast<int32_t>(descriptor.m_Parameters.m_BlockShape[1]);
 
     arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
     output.info()->set_data_layout(aclDataLayout);
@@ -41,19 +47,20 @@
 
 void ClBatchToSpaceNdWorkload::Execute() const
 {
-    ARMNN_SCOPED_PROFILING_EVENT_CL("ClBatchToSpaceNdWorkload_Execute");
+    ARMNN_SCOPED_PROFILING_EVENT_CL_GUID("ClBatchToSpaceNdWorkload_Execute", this->GetGuid());
     RunClFunction(m_Layer, CHECK_LOCATION());
 }
 
 arm_compute::Status ClBatchToSpaceNdWorkloadValidate(const TensorInfo& input,
                                                      const TensorInfo& output,
-                                                     const BatchToSpaceNdDescriptor& desc) {
-    DataLayout dataLayout = desc.m_DataLayout;
+                                                     const BatchToSpaceNdDescriptor& descriptor)
+{
+    DataLayout dataLayout = descriptor.m_DataLayout;
     const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, dataLayout);
 
     // ArmNN blockShape is [H, W] Cl asks for W, H
-    int32_t blockHeight = armnn::numeric_cast<int32_t>(desc.m_BlockShape[0]);
-    int32_t blockWidth = armnn::numeric_cast<int32_t>(desc.m_BlockShape[1]);
+    int32_t blockHeight = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[0]);
+    int32_t blockWidth = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[1]);
 
     const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, dataLayout);