IVGCVSW-5347 Update Readme for 20.11
* Adding delegate readme.md and TensorFlowLiteDelegateSupport.md
Change-Id: I1b8012440cf4cd6120902ad69c5b3a2a5e410d71
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
diff --git a/delegate/README.md b/delegate/README.md
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+++ b/delegate/README.md
@@ -0,0 +1,7 @@
+# The Arm NN TensorFlow Lite delegate
+
+'armnnDelegate' is a library for accelerating certain TensorFlow Lite operators on Arm hardware by providing
+the TensorFlow Lite interpreter with an alternative implementation of the operators via its delegation mechanism.
+
+For more information about the TensorFlow Lite operators that are supported,
+see [TensorFlowLiteDelegateSupport.md](./TensorFlowLiteDelegateSupport.md).
diff --git a/delegate/TensorFlowLiteDelegateSupport.md b/delegate/TensorFlowLiteDelegateSupport.md
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+# TensorFlow Lite operators that the Arm NN TensorFlow Lite Delegate supports
+
+This reference guide provides a list of TensorFlow Lite operators the Arm NN SDK currently supports.
+
+## Fully supported
+
+The Arm NN SDK TensorFlow Lite delegate currently supports the following operators:
+
+* ABS
+
+* ADD
+
+* AVERAGE_POOL_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
+
+* CONCATENATION, Supported Fused Activation: RELU , RELU6 , TANH, NONE
+
+* CONV_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
+
+* DEPTHWISE_CONV_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
+
+* DEQUANTIZE
+
+* DIV
+
+* EQUAL
+
+* EXP
+
+* FULLY_CONNECTED, Supported Fused Activation: RELU , RELU6 , TANH, NONE
+
+* GREATER
+
+* GREATER_OR_EQUAL
+
+* LESS
+
+* LESS_OR_EQUAL
+
+* LOGISTIC
+
+* LOG_SOFTMAX
+
+* L2_POOL_2D
+
+* MAXIMUM
+
+* MAX_POOL_2D, Supported Fused Activation: RELU , RELU6 , TANH, NONE
+
+* MEAN
+
+* MINIMUM
+
+* MUL
+
+* NEG
+
+* NOT_EQUAL
+
+* QUANTIZE
+
+* RESHAPE
+
+* RESIZE_BILINEAR
+
+* RESIZE_NEAREST_NEIGHBOR
+
+* RELU
+
+* RELU6
+
+* RSQRT
+
+* SOFTMAX
+
+* SQRT
+
+* SUB
+
+* TANH
+
+* TRANSPOSE
+
+* TRANSPOSE_CONV
+
+More machine learning operators will be supported in future releases.
diff --git a/src/armnnDeserializer/DeserializerSupport.md b/src/armnnDeserializer/DeserializerSupport.md
index 4e2ead4..2ff3a24 100644
--- a/src/armnnDeserializer/DeserializerSupport.md
+++ b/src/armnnDeserializer/DeserializerSupport.md
@@ -29,6 +29,7 @@
* Input
* InstanceNormalization
* L2Normalization
+* Logical
* LogSoftmax
* Lstm
* Maximum
diff --git a/src/armnnSerializer/SerializerSupport.md b/src/armnnSerializer/SerializerSupport.md
index 4383353..67dc5d1 100644
--- a/src/armnnSerializer/SerializerSupport.md
+++ b/src/armnnSerializer/SerializerSupport.md
@@ -28,6 +28,7 @@
* Input
* InstanceNormalization
* L2Normalization
+* Logical
* LogSoftmax
* Lstm
* Maximum
diff --git a/src/armnnTfLiteParser/TensorFlowLiteSupport.md b/src/armnnTfLiteParser/TensorFlowLiteSupport.md
index 9718b22..faad3d0 100644
--- a/src/armnnTfLiteParser/TensorFlowLiteSupport.md
+++ b/src/armnnTfLiteParser/TensorFlowLiteSupport.md
@@ -104,6 +104,8 @@
* FSRCNN
+* EfficientNet-lite
+
* RDN converted from [TensorFlow model](https://github.com/hengchuan/RDN-TensorFlow)
* Quantized RDN (CpuRef)