IVGCVSW-3296 Add CL backend support for ResizeNearestNeighbour
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I7f4c722141837939fd8904c52e75704a15c8a5e3
diff --git a/src/backends/cl/workloads/CMakeLists.txt b/src/backends/cl/workloads/CMakeLists.txt
index d98956f..2a3b1ad 100644
--- a/src/backends/cl/workloads/CMakeLists.txt
+++ b/src/backends/cl/workloads/CMakeLists.txt
@@ -60,8 +60,8 @@
ClQuantizeWorkload.hpp
ClReshapeWorkload.cpp
ClReshapeWorkload.hpp
- ClResizeBilinearFloatWorkload.cpp
- ClResizeBilinearFloatWorkload.hpp
+ ClResizeWorkload.cpp
+ ClResizeWorkload.hpp
ClSoftmaxBaseWorkload.cpp
ClSoftmaxBaseWorkload.hpp
ClSoftmaxFloatWorkload.cpp
diff --git a/src/backends/cl/workloads/ClResizeBilinearFloatWorkload.cpp b/src/backends/cl/workloads/ClResizeBilinearFloatWorkload.cpp
deleted file mode 100644
index ac7d60c..0000000
--- a/src/backends/cl/workloads/ClResizeBilinearFloatWorkload.cpp
+++ /dev/null
@@ -1,44 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#include "ClResizeBilinearFloatWorkload.hpp"
-#include <cl/ClTensorHandle.hpp>
-#include <backendsCommon/CpuTensorHandle.hpp>
-#include <cl/ClLayerSupport.hpp>
-#include <aclCommon/ArmComputeUtils.hpp>
-#include <aclCommon/ArmComputeTensorUtils.hpp>
-
-#include "ClWorkloadUtils.hpp"
-
-using namespace armnn::armcomputetensorutils;
-
-namespace armnn
-{
-
-ClResizeBilinearFloatWorkload::ClResizeBilinearFloatWorkload(const ResizeBilinearQueueDescriptor& descriptor,
- const WorkloadInfo& info)
- : FloatWorkload<ResizeBilinearQueueDescriptor>(descriptor, info)
-{
- m_Data.ValidateInputsOutputs("ClResizeBilinearFloatWorkload", 1, 1);
-
- arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
- arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
-
- arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout);
- input.info()->set_data_layout(aclDataLayout);
- output.info()->set_data_layout(aclDataLayout);
-
- m_ResizeBilinearLayer.configure(&input, &output, arm_compute::InterpolationPolicy::BILINEAR,
- arm_compute::BorderMode::REPLICATE, arm_compute::PixelValue(0.f),
- arm_compute::SamplingPolicy::TOP_LEFT);
-};
-
-void ClResizeBilinearFloatWorkload::Execute() const
-{
- ARMNN_SCOPED_PROFILING_EVENT_CL("ClResizeBilinearFloatWorkload_Execute");
- RunClFunction(m_ResizeBilinearLayer, CHECK_LOCATION());
-}
-
-} //namespace armnn
diff --git a/src/backends/cl/workloads/ClResizeBilinearFloatWorkload.hpp b/src/backends/cl/workloads/ClResizeBilinearFloatWorkload.hpp
deleted file mode 100644
index 07ddcec..0000000
--- a/src/backends/cl/workloads/ClResizeBilinearFloatWorkload.hpp
+++ /dev/null
@@ -1,25 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// SPDX-License-Identifier: MIT
-//
-
-#pragma once
-
-#include <backendsCommon/Workload.hpp>
-
-#include <arm_compute/runtime/CL/CLFunctions.h>
-
-namespace armnn
-{
-
-class ClResizeBilinearFloatWorkload : public FloatWorkload<ResizeBilinearQueueDescriptor>
-{
-public:
- ClResizeBilinearFloatWorkload(const ResizeBilinearQueueDescriptor& descriptor, const WorkloadInfo& info);
- void Execute() const override;
-
-private:
- mutable arm_compute::CLScale m_ResizeBilinearLayer;
-};
-
-} //namespace armnn
diff --git a/src/backends/cl/workloads/ClResizeWorkload.cpp b/src/backends/cl/workloads/ClResizeWorkload.cpp
new file mode 100644
index 0000000..3c9c3aa
--- /dev/null
+++ b/src/backends/cl/workloads/ClResizeWorkload.cpp
@@ -0,0 +1,74 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ClResizeWorkload.hpp"
+
+#include "ClWorkloadUtils.hpp"
+
+#include <aclCommon/ArmComputeUtils.hpp>
+#include <aclCommon/ArmComputeTensorUtils.hpp>
+
+#include <backendsCommon/CpuTensorHandle.hpp>
+
+#include <cl/ClLayerSupport.hpp>
+#include <cl/ClTensorHandle.hpp>
+
+using namespace armnn::armcomputetensorutils;
+
+namespace armnn
+{
+
+arm_compute::Status ClResizeWorkloadValidate(const TensorInfo& input,
+ const TensorInfo& output,
+ const ResizeDescriptor& descriptor)
+{
+ arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
+ arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
+
+ arm_compute::DataLayout aclDataLayout = ConvertDataLayout(descriptor.m_DataLayout);
+ aclInputInfo.set_data_layout(aclDataLayout);
+ aclOutputInfo.set_data_layout(aclDataLayout);
+
+ arm_compute::InterpolationPolicy aclInterpolationPolicy =
+ ConvertResizeMethodToAclInterpolationPolicy(descriptor.m_Method);
+
+ return arm_compute::CLScale::validate(&aclInputInfo,
+ &aclOutputInfo,
+ aclInterpolationPolicy,
+ arm_compute::BorderMode::REPLICATE,
+ arm_compute::PixelValue(0.f),
+ arm_compute::SamplingPolicy::TOP_LEFT);
+}
+
+ClResizeWorkload::ClResizeWorkload(const ResizeQueueDescriptor& descriptor, const WorkloadInfo& info) :
+ BaseWorkload<ResizeQueueDescriptor>(descriptor, info)
+{
+ m_Data.ValidateInputsOutputs("ClResizeWorkload", 1, 1);
+
+ arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+ arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
+ arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout);
+ input.info()->set_data_layout(aclDataLayout);
+ output.info()->set_data_layout(aclDataLayout);
+
+ arm_compute::InterpolationPolicy aclInterpolationPolicy =
+ ConvertResizeMethodToAclInterpolationPolicy(descriptor.m_Parameters.m_Method);
+
+ m_ResizeLayer.configure(&input,
+ &output,
+ aclInterpolationPolicy,
+ arm_compute::BorderMode::REPLICATE,
+ arm_compute::PixelValue(0.f),
+ arm_compute::SamplingPolicy::TOP_LEFT);
+};
+
+void ClResizeWorkload::Execute() const
+{
+ ARMNN_SCOPED_PROFILING_EVENT_CL("ClResizeWorkload_Execute");
+ RunClFunction(m_ResizeLayer, CHECK_LOCATION());
+}
+
+} //namespace armnn
diff --git a/src/backends/cl/workloads/ClResizeWorkload.hpp b/src/backends/cl/workloads/ClResizeWorkload.hpp
new file mode 100644
index 0000000..5a128fa
--- /dev/null
+++ b/src/backends/cl/workloads/ClResizeWorkload.hpp
@@ -0,0 +1,29 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <backendsCommon/Workload.hpp>
+
+#include <arm_compute/runtime/CL/CLFunctions.h>
+
+namespace armnn
+{
+
+arm_compute::Status ClResizeWorkloadValidate(const TensorInfo& input,
+ const TensorInfo& output,
+ const ResizeDescriptor& descriptor);
+
+class ClResizeWorkload : public BaseWorkload<ResizeQueueDescriptor>
+{
+public:
+ ClResizeWorkload(const ResizeQueueDescriptor& descriptor, const WorkloadInfo& info);
+ void Execute() const override;
+
+private:
+ mutable arm_compute::CLScale m_ResizeLayer;
+};
+
+} // namespace armnn
diff --git a/src/backends/cl/workloads/ClWorkloads.hpp b/src/backends/cl/workloads/ClWorkloads.hpp
index 256b68c..a64dea2 100644
--- a/src/backends/cl/workloads/ClWorkloads.hpp
+++ b/src/backends/cl/workloads/ClWorkloads.hpp
@@ -30,7 +30,7 @@
#include "ClPreluWorkload.hpp"
#include "ClQuantizeWorkload.hpp"
#include "ClReshapeWorkload.hpp"
-#include "ClResizeBilinearFloatWorkload.hpp"
+#include "ClResizeWorkload.hpp"
#include "ClSoftmaxFloatWorkload.hpp"
#include "ClSoftmaxUint8Workload.hpp"
#include "ClSpaceToBatchNdWorkload.hpp"