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+<a href="_mem_sync_workload_8cpp.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno">    1</span>&#160;<span class="comment">//</span></div><div class="line"><a name="l00002"></a><span class="lineno">    2</span>&#160;<span class="comment">// Copyright © 2017 Arm Ltd. All rights reserved.</span></div><div class="line"><a name="l00003"></a><span class="lineno">    3</span>&#160;<span class="comment">// SPDX-License-Identifier: MIT</span></div><div class="line"><a name="l00004"></a><span class="lineno">    4</span>&#160;<span class="comment">//</span></div><div class="line"><a name="l00005"></a><span class="lineno">    5</span>&#160;</div><div class="line"><a name="l00006"></a><span class="lineno">    6</span>&#160;<span class="preprocessor">#include &lt;<a class="code" href="_resolve_type_8hpp.html">ResolveType.hpp</a>&gt;</span></div><div class="line"><a name="l00007"></a><span class="lineno">    7</span>&#160;</div><div class="line"><a name="l00008"></a><span class="lineno">    8</span>&#160;<span class="preprocessor">#include &lt;<a class="code" href="_mem_sync_workload_8hpp.html">backendsCommon/MemSyncWorkload.hpp</a>&gt;</span></div><div class="line"><a name="l00009"></a><span class="lineno">    9</span>&#160;<span class="preprocessor">#include &lt;<a class="code" href="_cpu_tensor_handle_8hpp.html">backendsCommon/CpuTensorHandle.hpp</a>&gt;</span></div><div class="line"><a name="l00010"></a><span class="lineno">   10</span>&#160;</div><div class="line"><a name="l00011"></a><span class="lineno">   11</span>&#160;<span class="preprocessor">#include &lt;boost/cast.hpp&gt;</span></div><div class="line"><a name="l00012"></a><span class="lineno">   12</span>&#160;</div><div class="line"><a name="l00013"></a><span class="lineno">   13</span>&#160;<span class="preprocessor">#include &lt;cstring&gt;</span></div><div class="line"><a name="l00014"></a><span class="lineno">   14</span>&#160;</div><div class="line"><a name="l00015"></a><span class="lineno">   15</span>&#160;<span class="keyword">namespace </span><a class="code" href="namespacearmnn.html">armnn</a></div><div class="line"><a name="l00016"></a><span class="lineno">   16</span>&#160;{</div><div class="line"><a name="l00017"></a><span class="lineno">   17</span>&#160;</div><div class="line"><a name="l00018"></a><span class="lineno"><a class="line" href="classarmnn_1_1_sync_mem_generic_workload.html#ade8e0cdccf5d1bfaa93a2163b68498d8">   18</a></span>&#160;<a class="code" href="classarmnn_1_1_sync_mem_generic_workload.html#ade8e0cdccf5d1bfaa93a2163b68498d8">SyncMemGenericWorkload::SyncMemGenericWorkload</a>(<span class="keyword">const</span> <a class="code" href="structarmnn_1_1_mem_sync_queue_descriptor.html">MemSyncQueueDescriptor</a>&amp; descriptor,</div><div class="line"><a name="l00019"></a><span class="lineno">   19</span>&#160;                                                         <span class="keyword">const</span> <a class="code" href="structarmnn_1_1_workload_info.html">WorkloadInfo</a>&amp; info)</div><div class="line"><a name="l00020"></a><span class="lineno">   20</span>&#160;    : <a class="code" href="classarmnn_1_1_base_workload.html">BaseWorkload</a>&lt;<a class="code" href="structarmnn_1_1_mem_sync_queue_descriptor.html">MemSyncQueueDescriptor</a>&gt;(descriptor, info)</div><div class="line"><a name="l00021"></a><span class="lineno">   21</span>&#160;{</div><div class="line"><a name="l00022"></a><span class="lineno">   22</span>&#160;    m_TensorHandle = descriptor.<a class="code" href="structarmnn_1_1_queue_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">m_Inputs</a>[0];</div><div class="line"><a name="l00023"></a><span class="lineno">   23</span>&#160;}</div><div class="line"><a name="l00024"></a><span class="lineno">   24</span>&#160;</div><div class="line"><a name="l00025"></a><span class="lineno"><a class="line" href="classarmnn_1_1_sync_mem_generic_workload.html#ae071e8822437c78baea75c3aef3a263a">   25</a></span>&#160;<span class="keywordtype">void</span> <a class="code" href="classarmnn_1_1_sync_mem_generic_workload.html#ae071e8822437c78baea75c3aef3a263a">SyncMemGenericWorkload::Execute</a>()<span class="keyword"> const</span></div><div class="line"><a name="l00026"></a><span class="lineno">   26</span>&#160;<span class="keyword"></span>{</div><div class="line"><a name="l00027"></a><span class="lineno">   27</span>&#160;    <a class="code" href="_profiling_8hpp.html#a5ccc65e2c464ac05ce311fdae7ede03a">ARMNN_SCOPED_PROFILING_EVENT</a>(<a class="code" href="namespacearmnn.html#ae2f04a162585c0a5222a537efd5456aeaec0fc0100c4fc1ce4eea230c3dc10360">Compute::Undefined</a>, <span class="stringliteral">&quot;SyncMemGeneric_Execute&quot;</span>);</div><div class="line"><a name="l00028"></a><span class="lineno">   28</span>&#160;    m_TensorHandle-&gt;<a class="code" href="classarmnn_1_1_i_tensor_handle.html#a9afbc055a017adf1bc38ee137bca6e90">Map</a>(<span class="keyword">true</span>);</div><div class="line"><a name="l00029"></a><span class="lineno">   29</span>&#160;    m_TensorHandle-&gt;<a class="code" href="classarmnn_1_1_i_tensor_handle.html#a563609828050f1b3a7868c23f3365923">Unmap</a>();</div><div class="line"><a name="l00030"></a><span class="lineno">   30</span>&#160;}</div><div class="line"><a name="l00031"></a><span class="lineno">   31</span>&#160;</div><div class="line"><a name="l00032"></a><span class="lineno">   32</span>&#160;} <span class="comment">//namespace armnn</span></div><div class="ttc" id="_profiling_8hpp_html_a5ccc65e2c464ac05ce311fdae7ede03a"><div class="ttname"><a href="_profiling_8hpp.html#a5ccc65e2c464ac05ce311fdae7ede03a">ARMNN_SCOPED_PROFILING_EVENT</a></div><div class="ttdeci">#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)</div><div class="ttdef"><b>Definition:</b> <a href="_profiling_8hpp_source.html#l00170">Profiling.hpp:170</a></div></div>
+<div class="ttc" id="namespacearmnn_html_ae2f04a162585c0a5222a537efd5456aeaec0fc0100c4fc1ce4eea230c3dc10360"><div class="ttname"><a href="namespacearmnn.html#ae2f04a162585c0a5222a537efd5456aeaec0fc0100c4fc1ce4eea230c3dc10360">armnn::Compute::Undefined</a></div></div>
+<div class="ttc" id="classarmnn_1_1_i_tensor_handle_html_a9afbc055a017adf1bc38ee137bca6e90"><div class="ttname"><a href="classarmnn_1_1_i_tensor_handle.html#a9afbc055a017adf1bc38ee137bca6e90">armnn::ITensorHandle::Map</a></div><div class="ttdeci">virtual const void * Map(bool blocking=true) const =0</div></div>
+<div class="ttc" id="structarmnn_1_1_workload_info_html"><div class="ttname"><a href="structarmnn_1_1_workload_info.html">armnn::WorkloadInfo</a></div><div class="ttdef"><b>Definition:</b> <a href="include_2armnn_2backends_2_workload_info_8hpp_source.html#l00016">WorkloadInfo.hpp:16</a></div></div>
+<div class="ttc" id="_resolve_type_8hpp_html"><div class="ttname"><a href="_resolve_type_8hpp.html">ResolveType.hpp</a></div></div>
+<div class="ttc" id="structarmnn_1_1_mem_sync_queue_descriptor_html"><div class="ttname"><a href="structarmnn_1_1_mem_sync_queue_descriptor.html">armnn::MemSyncQueueDescriptor</a></div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.html#l00071">WorkloadData.hpp:71</a></div></div>
+<div class="ttc" id="namespacearmnn_html"><div class="ttname"><a href="namespacearmnn.html">armnn</a></div><div class="ttdef"><b>Definition:</b> <a href="_backend_helper_8hpp_source.html#l00011">BackendHelper.hpp:11</a></div></div>
+<div class="ttc" id="classarmnn_1_1_i_tensor_handle_html_a563609828050f1b3a7868c23f3365923"><div class="ttname"><a href="classarmnn_1_1_i_tensor_handle.html#a563609828050f1b3a7868c23f3365923">armnn::ITensorHandle::Unmap</a></div><div class="ttdeci">virtual void Unmap() const =0</div><div class="ttdoc">Unmap the tensor data. </div></div>
+<div class="ttc" id="_cpu_tensor_handle_8hpp_html"><div class="ttname"><a href="_cpu_tensor_handle_8hpp.html">CpuTensorHandle.hpp</a></div></div>
+<div class="ttc" id="classarmnn_1_1_sync_mem_generic_workload_html_ae071e8822437c78baea75c3aef3a263a"><div class="ttname"><a href="classarmnn_1_1_sync_mem_generic_workload.html#ae071e8822437c78baea75c3aef3a263a">armnn::SyncMemGenericWorkload::Execute</a></div><div class="ttdeci">void Execute() const override</div><div class="ttdef"><b>Definition:</b> <a href="_mem_sync_workload_8cpp_source.html#l00025">MemSyncWorkload.cpp:25</a></div></div>
+<div class="ttc" id="structarmnn_1_1_queue_descriptor_html_a4b50e46a6810018f3edecfb68b2a76b3"><div class="ttname"><a href="structarmnn_1_1_queue_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">armnn::QueueDescriptor::m_Inputs</a></div><div class="ttdeci">std::vector&lt; ITensorHandle * &gt; m_Inputs</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.html#l00030">WorkloadData.hpp:30</a></div></div>
+<div class="ttc" id="classarmnn_1_1_sync_mem_generic_workload_html_ade8e0cdccf5d1bfaa93a2163b68498d8"><div class="ttname"><a href="classarmnn_1_1_sync_mem_generic_workload.html#ade8e0cdccf5d1bfaa93a2163b68498d8">armnn::SyncMemGenericWorkload::SyncMemGenericWorkload</a></div><div class="ttdeci">SyncMemGenericWorkload(const MemSyncQueueDescriptor &amp;descriptor, const WorkloadInfo &amp;info)</div><div class="ttdef"><b>Definition:</b> <a href="_mem_sync_workload_8cpp_source.html#l00018">MemSyncWorkload.cpp:18</a></div></div>
+<div class="ttc" id="classarmnn_1_1_base_workload_html"><div class="ttname"><a href="classarmnn_1_1_base_workload.html">armnn::BaseWorkload</a></div><div class="ttdef"><b>Definition:</b> <a href="_workload_8hpp_source.html#l00028">Workload.hpp:28</a></div></div>
+<div class="ttc" id="_mem_sync_workload_8hpp_html"><div class="ttname"><a href="_mem_sync_workload_8hpp.html">MemSyncWorkload.hpp</a></div></div>
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