IVGCVSW-3726 Upload ArmNN Doxygen files
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+<div class="title">RefPreluWorkload.cpp</div> </div>
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+<div class="contents">
+<a href="_ref_prelu_workload_8cpp.xhtml">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span> <span class="comment">//</span></div><div class="line"><a name="l00002"></a><span class="lineno"> 2</span> <span class="comment">// Copyright © 2017 Arm Ltd. All rights reserved.</span></div><div class="line"><a name="l00003"></a><span class="lineno"> 3</span> <span class="comment">// SPDX-License-Identifier: MIT</span></div><div class="line"><a name="l00004"></a><span class="lineno"> 4</span> <span class="comment">//</span></div><div class="line"><a name="l00005"></a><span class="lineno"> 5</span> </div><div class="line"><a name="l00006"></a><span class="lineno"> 6</span> <span class="preprocessor">#include "<a class="code" href="_ref_prelu_workload_8hpp.xhtml">RefPreluWorkload.hpp</a>"</span></div><div class="line"><a name="l00007"></a><span class="lineno"> 7</span> </div><div class="line"><a name="l00008"></a><span class="lineno"> 8</span> <span class="preprocessor">#include "<a class="code" href="_ref_workload_utils_8hpp.xhtml">RefWorkloadUtils.hpp</a>"</span></div><div class="line"><a name="l00009"></a><span class="lineno"> 9</span> <span class="preprocessor">#include "<a class="code" href="_prelu_impl_8hpp.xhtml">PreluImpl.hpp</a>"</span></div><div class="line"><a name="l00010"></a><span class="lineno"> 10</span> </div><div class="line"><a name="l00011"></a><span class="lineno"> 11</span> <span class="preprocessor">#include <<a class="code" href="_profiling_8hpp.xhtml">Profiling.hpp</a>></span></div><div class="line"><a name="l00012"></a><span class="lineno"> 12</span> </div><div class="line"><a name="l00013"></a><span class="lineno"> 13</span> <span class="keyword">namespace </span><a class="code" href="namespacearmnn.xhtml">armnn</a></div><div class="line"><a name="l00014"></a><span class="lineno"> 14</span> {</div><div class="line"><a name="l00015"></a><span class="lineno"> 15</span> </div><div class="line"><a name="l00016"></a><span class="lineno"><a class="line" href="classarmnn_1_1_ref_prelu_workload.xhtml#ae74f32187e219dd31c3feb45568b3fa9"> 16</a></span> <a class="code" href="classarmnn_1_1_ref_prelu_workload.xhtml#ae74f32187e219dd31c3feb45568b3fa9">RefPreluWorkload::RefPreluWorkload</a>(<span class="keyword">const</span> <a class="code" href="structarmnn_1_1_prelu_queue_descriptor.xhtml">PreluQueueDescriptor</a>& descriptor,</div><div class="line"><a name="l00017"></a><span class="lineno"> 17</span>  <span class="keyword">const</span> <a class="code" href="structarmnn_1_1_workload_info.xhtml">WorkloadInfo</a>& info)</div><div class="line"><a name="l00018"></a><span class="lineno"> 18</span>  : <a class="code" href="classarmnn_1_1_base_workload.xhtml">BaseWorkload</a>(descriptor, info)</div><div class="line"><a name="l00019"></a><span class="lineno"> 19</span> {}</div><div class="line"><a name="l00020"></a><span class="lineno"> 20</span> </div><div class="line"><a name="l00021"></a><span class="lineno"><a class="line" href="classarmnn_1_1_ref_prelu_workload.xhtml#ae071e8822437c78baea75c3aef3a263a"> 21</a></span> <span class="keywordtype">void</span> <a class="code" href="classarmnn_1_1_ref_prelu_workload.xhtml#ae071e8822437c78baea75c3aef3a263a">RefPreluWorkload::Execute</a>()<span class="keyword"> const</span></div><div class="line"><a name="l00022"></a><span class="lineno"> 22</span> <span class="keyword"></span>{</div><div class="line"><a name="l00023"></a><span class="lineno"> 23</span>  <a class="code" href="_profiling_8hpp.xhtml#a5ccc65e2c464ac05ce311fdae7ede03a">ARMNN_SCOPED_PROFILING_EVENT</a>(<a class="code" href="namespacearmnn.xhtml#ae2f04a162585c0a5222a537efd5456aea83c2c4e9b658ccafbcbe6309c5d84c64">Compute::CpuRef</a>, <span class="stringliteral">"RefPreluWorkload_Execute"</span>);</div><div class="line"><a name="l00024"></a><span class="lineno"> 24</span> </div><div class="line"><a name="l00025"></a><span class="lineno"> 25</span>  std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(<a class="code" href="namespacearmnn.xhtml#a93d269806f34407695dc10f510001c30">GetTensorInfo</a>(<a class="code" href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">m_Data</a>.<a class="code" href="structarmnn_1_1_queue_descriptor.xhtml#a4b50e46a6810018f3edecfb68b2a76b3">m_Inputs</a>[0]),</div><div class="line"><a name="l00026"></a><span class="lineno"> 26</span>  <a class="code" href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">m_Data</a>.<a class="code" href="structarmnn_1_1_queue_descriptor.xhtml#a4b50e46a6810018f3edecfb68b2a76b3">m_Inputs</a>[0]->Map());</div><div class="line"><a name="l00027"></a><span class="lineno"> 27</span>  std::unique_ptr<Decoder<float>> alphaDecoder = MakeDecoder<float>(<a class="code" href="namespacearmnn.xhtml#a93d269806f34407695dc10f510001c30">GetTensorInfo</a>(<a class="code" href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">m_Data</a>.<a class="code" href="structarmnn_1_1_queue_descriptor.xhtml#a4b50e46a6810018f3edecfb68b2a76b3">m_Inputs</a>[1]),</div><div class="line"><a name="l00028"></a><span class="lineno"> 28</span>  <a class="code" href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">m_Data</a>.<a class="code" href="structarmnn_1_1_queue_descriptor.xhtml#a4b50e46a6810018f3edecfb68b2a76b3">m_Inputs</a>[1]->Map());</div><div class="line"><a name="l00029"></a><span class="lineno"> 29</span>  std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(<a class="code" href="namespacearmnn.xhtml#a93d269806f34407695dc10f510001c30">GetTensorInfo</a>(<a class="code" href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">m_Data</a>.<a class="code" href="structarmnn_1_1_queue_descriptor.xhtml#a6abd491bb99ffe88bd472c1ae5a1ed1a">m_Outputs</a>[0]),</div><div class="line"><a name="l00030"></a><span class="lineno"> 30</span>  <a class="code" href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">m_Data</a>.<a class="code" href="structarmnn_1_1_queue_descriptor.xhtml#a6abd491bb99ffe88bd472c1ae5a1ed1a">m_Outputs</a>[0]->Map());</div><div class="line"><a name="l00031"></a><span class="lineno"> 31</span> </div><div class="line"><a name="l00032"></a><span class="lineno"> 32</span>  <a class="code" href="namespacearmnn.xhtml#aa1ca65b3ba7f7c760eb3d5563c12864e">PreluImpl</a>(<a class="code" href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">m_Data</a>, *inputDecoder, *alphaDecoder, *outputEncoder);</div><div class="line"><a name="l00033"></a><span class="lineno"> 33</span> }</div><div class="line"><a name="l00034"></a><span class="lineno"> 34</span> </div><div class="line"><a name="l00035"></a><span class="lineno"> 35</span> } <span class="comment">// namespace armnn</span></div><div class="ttc" id="namespacearmnn_xhtml_ae2f04a162585c0a5222a537efd5456aea83c2c4e9b658ccafbcbe6309c5d84c64"><div class="ttname"><a href="namespacearmnn.xhtml#ae2f04a162585c0a5222a537efd5456aea83c2c4e9b658ccafbcbe6309c5d84c64">armnn::Compute::CpuRef</a></div><div class="ttdoc">CPU Execution: Reference C++ kernels. </div></div>
+<div class="ttc" id="_ref_workload_utils_8hpp_xhtml"><div class="ttname"><a href="_ref_workload_utils_8hpp.xhtml">RefWorkloadUtils.hpp</a></div></div>
+<div class="ttc" id="classarmnn_1_1_base_workload_xhtml_a0a487c549c63319505095b855ea3c195"><div class="ttname"><a href="classarmnn_1_1_base_workload.xhtml#a0a487c549c63319505095b855ea3c195">armnn::BaseWorkload< PreluQueueDescriptor >::m_Data</a></div><div class="ttdeci">const PreluQueueDescriptor m_Data</div><div class="ttdef"><b>Definition:</b> <a href="_workload_8hpp_source.xhtml#l00046">Workload.hpp:46</a></div></div>
+<div class="ttc" id="namespacearmnn_xhtml_a93d269806f34407695dc10f510001c30"><div class="ttname"><a href="namespacearmnn.xhtml#a93d269806f34407695dc10f510001c30">armnn::GetTensorInfo</a></div><div class="ttdeci">const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)</div><div class="ttdoc">float32 helpers </div><div class="ttdef"><b>Definition:</b> <a href="_ref_workload_utils_8hpp_source.xhtml#l00025">RefWorkloadUtils.hpp:25</a></div></div>
+<div class="ttc" id="_ref_prelu_workload_8hpp_xhtml"><div class="ttname"><a href="_ref_prelu_workload_8hpp.xhtml">RefPreluWorkload.hpp</a></div></div>
+<div class="ttc" id="namespacearmnn_xhtml"><div class="ttname"><a href="namespacearmnn.xhtml">armnn</a></div><div class="ttdoc">Copyright (c) 2020 ARM Limited. </div><div class="ttdef"><b>Definition:</b> <a href="00__introduction_8dox_source.xhtml#l00025">00_introduction.dox:25</a></div></div>
+<div class="ttc" id="structarmnn_1_1_prelu_queue_descriptor_xhtml"><div class="ttname"><a href="structarmnn_1_1_prelu_queue_descriptor.xhtml">armnn::PreluQueueDescriptor</a></div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.xhtml#l00489">WorkloadData.hpp:489</a></div></div>
+<div class="ttc" id="namespacearmnn_xhtml_aa1ca65b3ba7f7c760eb3d5563c12864e"><div class="ttname"><a href="namespacearmnn.xhtml#aa1ca65b3ba7f7c760eb3d5563c12864e">armnn::PreluImpl</a></div><div class="ttdeci">void PreluImpl(const PreluQueueDescriptor &data, Decoder< float > &inputData, Decoder< float > &alphaData, Encoder< float > &outputData)</div><div class="ttdef"><b>Definition:</b> <a href="_prelu_impl_8cpp_source.xhtml#l00013">PreluImpl.cpp:13</a></div></div>
+<div class="ttc" id="_profiling_8hpp_xhtml_a5ccc65e2c464ac05ce311fdae7ede03a"><div class="ttname"><a href="_profiling_8hpp.xhtml#a5ccc65e2c464ac05ce311fdae7ede03a">ARMNN_SCOPED_PROFILING_EVENT</a></div><div class="ttdeci">#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)</div><div class="ttdef"><b>Definition:</b> <a href="_profiling_8hpp_source.xhtml#l00169">Profiling.hpp:169</a></div></div>
+<div class="ttc" id="classarmnn_1_1_ref_prelu_workload_xhtml_ae071e8822437c78baea75c3aef3a263a"><div class="ttname"><a href="classarmnn_1_1_ref_prelu_workload.xhtml#ae071e8822437c78baea75c3aef3a263a">armnn::RefPreluWorkload::Execute</a></div><div class="ttdeci">virtual void Execute() const override</div><div class="ttdef"><b>Definition:</b> <a href="_ref_prelu_workload_8cpp_source.xhtml#l00021">RefPreluWorkload.cpp:21</a></div></div>
+<div class="ttc" id="classarmnn_1_1_base_workload_xhtml"><div class="ttname"><a href="classarmnn_1_1_base_workload.xhtml">armnn::BaseWorkload</a></div><div class="ttdef"><b>Definition:</b> <a href="_workload_8hpp_source.xhtml#l00028">Workload.hpp:28</a></div></div>
+<div class="ttc" id="structarmnn_1_1_queue_descriptor_xhtml_a6abd491bb99ffe88bd472c1ae5a1ed1a"><div class="ttname"><a href="structarmnn_1_1_queue_descriptor.xhtml#a6abd491bb99ffe88bd472c1ae5a1ed1a">armnn::QueueDescriptor::m_Outputs</a></div><div class="ttdeci">std::vector< ITensorHandle * > m_Outputs</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.xhtml#l00031">WorkloadData.hpp:31</a></div></div>
+<div class="ttc" id="classarmnn_1_1_ref_prelu_workload_xhtml_ae74f32187e219dd31c3feb45568b3fa9"><div class="ttname"><a href="classarmnn_1_1_ref_prelu_workload.xhtml#ae74f32187e219dd31c3feb45568b3fa9">armnn::RefPreluWorkload::RefPreluWorkload</a></div><div class="ttdeci">RefPreluWorkload(const PreluQueueDescriptor &descriptor, const WorkloadInfo &info)</div><div class="ttdef"><b>Definition:</b> <a href="_ref_prelu_workload_8cpp_source.xhtml#l00016">RefPreluWorkload.cpp:16</a></div></div>
+<div class="ttc" id="structarmnn_1_1_workload_info_xhtml"><div class="ttname"><a href="structarmnn_1_1_workload_info.xhtml">armnn::WorkloadInfo</a></div><div class="ttdoc">Contains information about inputs and outputs to a layer. </div><div class="ttdef"><b>Definition:</b> <a href="include_2armnn_2backends_2_workload_info_8hpp_source.xhtml#l00016">WorkloadInfo.hpp:16</a></div></div>
+<div class="ttc" id="_prelu_impl_8hpp_xhtml"><div class="ttname"><a href="_prelu_impl_8hpp.xhtml">PreluImpl.hpp</a></div></div>
+<div class="ttc" id="structarmnn_1_1_queue_descriptor_xhtml_a4b50e46a6810018f3edecfb68b2a76b3"><div class="ttname"><a href="structarmnn_1_1_queue_descriptor.xhtml#a4b50e46a6810018f3edecfb68b2a76b3">armnn::QueueDescriptor::m_Inputs</a></div><div class="ttdeci">std::vector< ITensorHandle * > m_Inputs</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.xhtml#l00030">WorkloadData.hpp:30</a></div></div>
+<div class="ttc" id="_profiling_8hpp_xhtml"><div class="ttname"><a href="_profiling_8hpp.xhtml">Profiling.hpp</a></div></div>
+</div><!-- fragment --></div><!-- contents -->
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+ <li class="navelem"><a class="el" href="dir_68267d1309a1af8e8297ef4c3efbcdba.xhtml">src</a></li><li class="navelem"><a class="el" href="dir_0f3cdec46afbc61a1ded8e1687c9c9a0.xhtml">backends</a></li><li class="navelem"><a class="el" href="dir_efae4012d0e357ebeaba7d02491d70e5.xhtml">reference</a></li><li class="navelem"><a class="el" href="dir_d2f3b8e2e64df3181ebe92efcc0a3012.xhtml">workloads</a></li><li class="navelem"><a class="el" href="_ref_prelu_workload_8cpp.xhtml">RefPreluWorkload.cpp</a></li>
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