commit e1fa50c70c647e3ba6dec0eb49ce82a3820fb6bb
author jimfly01 <jim.flynn@arm.com> Fri Sep 21 12:09:51 2018 +0100
committer Matthew Bentham <matthew.bentham@arm.com> Wed Oct 10 16:16:57 2018 +0100
tree 6cc31b7a37e3ab81a069d124bcead4fe1ad97119
parent 1e4c31dafb1c8984a126fa1d211ed8f9eedaf7cc

IVGCVSW-1882: Added ClPadWorkload

* added ClPadWorkload class
* Updated ClWorkloadFactory
* added IsPadSupportedCl function
* Updated build files

Change-Id: Iadccc340a0eae1ff30fab6441854acac7f8edc92

src/backends/ClWorkloadFactory.cpp

diff --git a/src/backends/ClWorkloadFactory.cpp b/src/backends/ClWorkloadFactory.cpp
index 6aee233..6d7ff3d 100644
--- a/src/backends/ClWorkloadFactory.cpp
+++ b/src/backends/ClWorkloadFactory.cpp
@@ -270,7 +270,8 @@
 std::unique_ptr<IWorkload> ClWorkloadFactory::CreatePad(const PadQueueDescriptor& descriptor,
                                                         const WorkloadInfo& info) const
 {
-    return MakeWorkload<NullWorkload, NullWorkload>(descriptor, info);
+    return MakeWorkload<ClPadWorkload<armnn::DataType::Float16, armnn::DataType::Float32>,
+                        ClPadWorkload<armnn::DataType::QuantisedAsymm8>>(descriptor, info);
 }
 
 void ClWorkloadFactory::Finalize()