commit e9444751017fe108ce80fd5c270d04fffeb14e1e
author Sadik Armagan <sadik.armagan@arm.com> Wed Dec 02 11:28:58 2020 +0000
committer Sadik Armagan <sadik.armagan@arm.com> Wed Dec 02 11:29:35 2020 +0000
tree 29601fdf9017a2dbce71983b995709c24e6c773c
parent bbbefecd34a9420bcb003dd230402c55ee5150d5

IVGCVSW-5482 'Add a ClCompileContext parameter to each ClWorkload Constructor'

* Injected CLCompileContext object to each CL workload.

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I4837dbd3d5b56cf743b3b89c944e3cdf8b11a42a

src/backends/cl/workloads/ClQLstmWorkload.cpp

diff --git a/src/backends/cl/workloads/ClQLstmWorkload.cpp b/src/backends/cl/workloads/ClQLstmWorkload.cpp
index 7ece05f..0ae3715 100644
--- a/src/backends/cl/workloads/ClQLstmWorkload.cpp
+++ b/src/backends/cl/workloads/ClQLstmWorkload.cpp
@@ -14,7 +14,9 @@
 {
 using namespace armcomputetensorutils;
 
-ClQLstmWorkload::ClQLstmWorkload(const QLstmQueueDescriptor& descriptor, const WorkloadInfo& info)
+ClQLstmWorkload::ClQLstmWorkload(const QLstmQueueDescriptor& descriptor,
+                                 const WorkloadInfo& info,
+                                 const arm_compute::CLCompileContext& clCompileContext)
     : BaseWorkload<QLstmQueueDescriptor>(descriptor, info)
 {
     arm_compute::LSTMParams<arm_compute::ICLTensor> qLstmParams;
@@ -150,8 +152,9 @@
                                         m_Data.m_Parameters.m_CellIntermediateScale,
                                         m_Data.m_Parameters.m_OutputIntermediateScale);
 
-    // QLSTM NEON configure
-    m_QLstmLayer.configure(&input,
+    // QLSTM CL configure
+    m_QLstmLayer.configure(clCompileContext,
+                           &input,
                            m_InputToForgetWeightsTensor.get(),
                            m_InputToCellWeightsTensor.get(),
                            m_InputToOutputWeightsTensor.get(),