IVGCVSW-4863 ADD,SUB,DIV,MUL,MAXIMUM and MINIMUM int32 VTS test
skipped in CpuRef
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I1c870ac258e8c3805a95b259cb40731f8e81541e
diff --git a/src/backends/backendsCommon/WorkloadData.cpp b/src/backends/backendsCommon/WorkloadData.cpp
index 8f751c4..d3e58b6 100644
--- a/src/backends/backendsCommon/WorkloadData.cpp
+++ b/src/backends/backendsCommon/WorkloadData.cpp
@@ -1074,7 +1074,8 @@
DataType::Float16,
DataType::QAsymmS8,
DataType::QAsymmU8,
- DataType::QSymmS16
+ DataType::QSymmS16,
+ DataType::Signed32
};
ValidateDataTypes(inputTensorInfo0, supportedTypes, descriptorName);
@@ -1110,7 +1111,8 @@
DataType::Float32,
DataType::QAsymmS8,
DataType::QAsymmU8,
- DataType::QSymmS16
+ DataType::QSymmS16,
+ DataType::Signed32
};
ValidateDataTypes(inputTensorInfo0, supportedTypes, descriptorName);
@@ -2161,7 +2163,8 @@
DataType::Float32,
DataType::QAsymmS8,
DataType::QAsymmU8,
- DataType::QSymmS16
+ DataType::QSymmS16,
+ DataType::Signed32
};
ValidateDataTypes(inputTensorInfo0, supportedTypes, descriptorName);
@@ -2194,7 +2197,8 @@
DataType::Float32,
DataType::QAsymmS8,
DataType::QAsymmU8,
- DataType::QSymmS16
+ DataType::QSymmS16,
+ DataType::Signed32,
};
ValidateDataTypes(inputTensorInfo0, supportedTypes, descriptorName);