jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "ClPadWorkload.hpp" |
| 7 | |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 8 | #include <cl/ClTensorHandle.hpp> |
| 9 | #include <aclCommon/ArmComputeTensorUtils.hpp> |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 10 | #include <arm_compute/core/Types.h> |
| 11 | |
David Beck | ac42efd | 2018-09-26 17:41:13 +0100 | [diff] [blame] | 12 | #include "ClWorkloadUtils.hpp" |
| 13 | |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 14 | namespace armnn |
| 15 | { |
| 16 | using namespace armcomputetensorutils; |
| 17 | |
Nattapat Chaimanowong | 4e00a3d | 2018-10-09 17:05:24 +0100 | [diff] [blame] | 18 | ClPadWorkload::ClPadWorkload(const PadQueueDescriptor& descriptor, const WorkloadInfo& info) |
| 19 | : BaseWorkload<PadQueueDescriptor>(descriptor, info) |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 20 | { |
| 21 | this->m_Data.ValidateInputsOutputs("ClPadWorkload", 1, 1); |
| 22 | |
| 23 | arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(this->m_Data.m_Inputs[0])->GetTensor(); |
| 24 | arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(this->m_Data.m_Outputs[0])->GetTensor(); |
Mohamed Nour Abouelseoud | 7420e55 | 2018-10-12 12:26:24 +0100 | [diff] [blame] | 25 | |
| 26 | std::vector<std::pair<unsigned int, unsigned int>> reversed_PadList(descriptor.m_Parameters.m_PadList.size()); |
| 27 | |
| 28 | std::reverse_copy(std::begin(descriptor.m_Parameters.m_PadList), |
| 29 | std::end(descriptor.m_Parameters.m_PadList), |
| 30 | std::begin(reversed_PadList)); |
| 31 | |
| 32 | arm_compute::PaddingList padList = static_cast<arm_compute::PaddingList>(reversed_PadList); |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 33 | |
Mike Kelly | 0a08ec6 | 2019-07-25 08:39:31 +0100 | [diff] [blame] | 34 | arm_compute::PixelValue pixelValue = GetPixelValue(input, descriptor.m_Parameters.m_PadValue); |
FinnWilliamsArm | ab80162 | 2019-07-09 14:46:28 +0100 | [diff] [blame] | 35 | |
| 36 | m_Layer.configure(&input, &output, padList, pixelValue); |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 37 | } |
| 38 | |
Nattapat Chaimanowong | 4e00a3d | 2018-10-09 17:05:24 +0100 | [diff] [blame] | 39 | void ClPadWorkload::Execute() const |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 40 | { |
| 41 | ARMNN_SCOPED_PROFILING_EVENT_CL("ClPadWorkload_Execute"); |
Aron Virginas-Tar | a8e06ed | 2018-10-19 16:46:15 +0100 | [diff] [blame] | 42 | RunClFunction(m_Layer, CHECK_LOCATION()); |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 43 | } |
| 44 | |
arovir01 | 085f0a4 | 2018-10-08 14:48:19 +0100 | [diff] [blame] | 45 | arm_compute::Status ClPadValidate(const TensorInfo& input, |
| 46 | const TensorInfo& output, |
| 47 | const PadDescriptor& descriptor) |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 48 | { |
| 49 | const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input); |
| 50 | const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output); |
Éanna Ó Catháin | d0a1608 | 2019-01-14 15:50:08 +0000 | [diff] [blame] | 51 | |
| 52 | std::vector<std::pair<unsigned int, unsigned int>> reversed_PadList(descriptor.m_PadList.size()); |
| 53 | |
| 54 | std::reverse_copy(std::begin(descriptor.m_PadList), |
| 55 | std::end(descriptor.m_PadList), |
| 56 | std::begin(reversed_PadList)); |
| 57 | |
| 58 | arm_compute::PaddingList padList = static_cast<arm_compute::PaddingList>(reversed_PadList); |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 59 | |
| 60 | const arm_compute::Status aclStatus = arm_compute::CLPadLayer::validate(&aclInputInfo, |
| 61 | &aclOutputInfo, |
| 62 | padList); |
| 63 | |
arovir01 | 085f0a4 | 2018-10-08 14:48:19 +0100 | [diff] [blame] | 64 | return aclStatus; |
jimfly01 | e1fa50c | 2018-09-21 12:09:51 +0100 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | } // namespace armnn |