Matthew Sloyan | b63a311 | 2021-09-08 13:05:51 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2021 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
| 8 | #include <backendsCommon/Workload.hpp> |
| 9 | #include <backendsCommon/WorkloadData.hpp> |
| 10 | #include "Decoders.hpp" |
| 11 | #include "Encoders.hpp" |
| 12 | |
| 13 | namespace armnn |
| 14 | { |
| 15 | |
| 16 | class RefConvolution3dWorkload : public BaseWorkload<Convolution3dQueueDescriptor> |
| 17 | { |
| 18 | public: |
| 19 | explicit RefConvolution3dWorkload(const Convolution3dQueueDescriptor& descriptor, |
| 20 | const WorkloadInfo& info); |
| 21 | |
Matthew Sloyan | 5d7b0a3 | 2021-10-18 13:07:49 +0100 | [diff] [blame] | 22 | void PostAllocationConfigure() override; |
Matthew Sloyan | b63a311 | 2021-09-08 13:05:51 +0100 | [diff] [blame] | 23 | |
| 24 | void Execute() const override; |
| 25 | void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; |
| 26 | |
| 27 | private: |
Matthew Sloyan | 5d7b0a3 | 2021-10-18 13:07:49 +0100 | [diff] [blame] | 28 | void PostAllocationConfigure(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs); |
Matthew Sloyan | b63a311 | 2021-09-08 13:05:51 +0100 | [diff] [blame] | 29 | void Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const; |
Matthew Sloyan | b63a311 | 2021-09-08 13:05:51 +0100 | [diff] [blame] | 30 | |
| 31 | std::unique_ptr<Decoder<float>> m_FilterDecoder; |
| 32 | std::unique_ptr<Decoder<float>> m_BiasDecoder; |
| 33 | |
| 34 | TensorShape m_FilterShape; |
| 35 | }; |
| 36 | |
| 37 | } //namespace armnn |
| 38 | |