telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | |
| 6 | #include "ClDepthwiseConvolutionUint8Workload.hpp" |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 7 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 8 | #include "backends/CpuTensorHandle.hpp" |
| 9 | |
Matthew Bentham | 14e4669 | 2018-09-20 15:35:30 +0100 | [diff] [blame] | 10 | #include "ClWorkloadUtils.hpp" |
| 11 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 12 | namespace armnn |
| 13 | { |
| 14 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 15 | ClDepthwiseConvolutionUint8Workload::ClDepthwiseConvolutionUint8Workload( |
| 16 | const DepthwiseConvolution2dQueueDescriptor& descriptor, |
| 17 | const WorkloadInfo& info) |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 18 | : ClDepthwiseConvolutionBaseWorkload(descriptor, info) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 19 | { |
Matthew Bentham | 785df50 | 2018-09-21 10:29:58 +0100 | [diff] [blame] | 20 | InitializeArmComputeClTensorData(*m_KernelTensor, m_Data.m_Weight); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 21 | |
| 22 | if (m_BiasTensor) |
| 23 | { |
Matthew Bentham | 785df50 | 2018-09-21 10:29:58 +0100 | [diff] [blame] | 24 | InitializeArmComputeClTensorData(*m_BiasTensor, m_Data.m_Bias); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 25 | } |
| 26 | |
| 27 | m_DepthwiseConvolutionLayer->prepare(); |
| 28 | FreeUnusedTensors(); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 29 | } |
| 30 | |
| 31 | void ClDepthwiseConvolutionUint8Workload::Execute() const |
| 32 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 33 | ARMNN_SCOPED_PROFILING_EVENT_CL("ClDepthwiseConvolutionUint8Workload_Execute"); |
| 34 | BOOST_ASSERT(m_DepthwiseConvolutionLayer); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 35 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 36 | m_DepthwiseConvolutionLayer->run(); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 37 | } |
| 38 | |
| 39 | } //namespace armnn |
| 40 | |