Nattapat Chaimanowong | 1216b58 | 2018-11-23 15:33:41 +0000 | [diff] [blame] | 1 | // |
Mike Kelly | 386ff1a | 2021-03-29 15:04:50 +0100 | [diff] [blame] | 2 | // Copyright © 2017 Arm Ltd and Contributors. All rights reserved. |
Nattapat Chaimanowong | 1216b58 | 2018-11-23 15:33:41 +0000 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
| 8 | #include <backendsCommon/Workload.hpp> |
| 9 | |
Nattapat Chaimanowong | 1216b58 | 2018-11-23 15:33:41 +0000 | [diff] [blame] | 10 | namespace armnn |
| 11 | { |
| 12 | |
Matteo Martincigh | e851b3d | 2019-05-28 14:31:20 +0100 | [diff] [blame] | 13 | class RefStridedSliceWorkload : public BaseWorkload<StridedSliceQueueDescriptor> |
Nattapat Chaimanowong | 1216b58 | 2018-11-23 15:33:41 +0000 | [diff] [blame] | 14 | { |
| 15 | public: |
Matteo Martincigh | e851b3d | 2019-05-28 14:31:20 +0100 | [diff] [blame] | 16 | RefStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, const WorkloadInfo& info); |
Nattapat Chaimanowong | 1216b58 | 2018-11-23 15:33:41 +0000 | [diff] [blame] | 17 | void Execute() const override; |
Finn Williams | b8181f7 | 2021-04-07 10:23:21 +0100 | [diff] [blame] | 18 | void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override; |
| 19 | private: |
| 20 | void Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const; |
Nattapat Chaimanowong | 1216b58 | 2018-11-23 15:33:41 +0000 | [diff] [blame] | 21 | }; |
| 22 | |
Matteo Martincigh | e851b3d | 2019-05-28 14:31:20 +0100 | [diff] [blame] | 23 | } // namespace armnn |