Mike Kelly | 831faed | 2018-11-28 11:52:08 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "ClBatchToSpaceNdWorkload.hpp" |
| 7 | |
| 8 | #include <cl/ClTensorHandle.hpp> |
James Conroy | 1f58f03 | 2021-04-27 17:13:27 +0100 | [diff] [blame^] | 9 | #include <backendsCommon/TensorHandle.hpp> |
Mike Kelly | 831faed | 2018-11-28 11:52:08 +0000 | [diff] [blame] | 10 | #include <aclCommon/ArmComputeTensorUtils.hpp> |
| 11 | |
Matthew Sloyan | 171214c | 2020-09-09 09:07:37 +0100 | [diff] [blame] | 12 | #include <armnn/utility/NumericCast.hpp> |
| 13 | |
Mike Kelly | 831faed | 2018-11-28 11:52:08 +0000 | [diff] [blame] | 14 | #include "ClWorkloadUtils.hpp" |
| 15 | |
| 16 | namespace armnn |
| 17 | { |
| 18 | using namespace armcomputetensorutils; |
| 19 | |
| 20 | ClBatchToSpaceNdWorkload::ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& desc, |
Sadik Armagan | e944475 | 2020-12-02 11:28:58 +0000 | [diff] [blame] | 21 | const WorkloadInfo& info, |
| 22 | const arm_compute::CLCompileContext& clCompileContext) |
| 23 | : BaseWorkload<BatchToSpaceNdQueueDescriptor>(desc, info) |
Mike Kelly | 831faed | 2018-11-28 11:52:08 +0000 | [diff] [blame] | 24 | { |
| 25 | m_Data.ValidateInputsOutputs("ClBatchToSpaceNdWorkload", 1, 1); |
| 26 | |
| 27 | arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); |
| 28 | |
| 29 | arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); |
| 30 | input.info()->set_data_layout(aclDataLayout); |
| 31 | |
| 32 | // ArmNN blockShape is [H, W] Cl asks for W, H |
Matthew Sloyan | 171214c | 2020-09-09 09:07:37 +0100 | [diff] [blame] | 33 | int32_t blockHeight = armnn::numeric_cast<int32_t>(desc.m_Parameters.m_BlockShape[0]); |
| 34 | int32_t blockWidth = armnn::numeric_cast<int32_t>(desc.m_Parameters.m_BlockShape[1]); |
Mike Kelly | 831faed | 2018-11-28 11:52:08 +0000 | [diff] [blame] | 35 | |
| 36 | arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); |
| 37 | output.info()->set_data_layout(aclDataLayout); |
| 38 | |
Sadik Armagan | e944475 | 2020-12-02 11:28:58 +0000 | [diff] [blame] | 39 | m_Layer.configure(clCompileContext, &input, blockWidth, blockHeight, &output); |
Mike Kelly | 831faed | 2018-11-28 11:52:08 +0000 | [diff] [blame] | 40 | } |
| 41 | |
| 42 | void ClBatchToSpaceNdWorkload::Execute() const |
| 43 | { |
| 44 | ARMNN_SCOPED_PROFILING_EVENT_CL("ClBatchToSpaceNdWorkload_Execute"); |
| 45 | RunClFunction(m_Layer, CHECK_LOCATION()); |
| 46 | } |
| 47 | |
| 48 | arm_compute::Status ClBatchToSpaceNdWorkloadValidate(const TensorInfo& input, |
| 49 | const TensorInfo& output, |
| 50 | const BatchToSpaceNdDescriptor& desc) { |
| 51 | DataLayout dataLayout = desc.m_DataLayout; |
| 52 | const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, dataLayout); |
| 53 | |
| 54 | // ArmNN blockShape is [H, W] Cl asks for W, H |
Matthew Sloyan | 171214c | 2020-09-09 09:07:37 +0100 | [diff] [blame] | 55 | int32_t blockHeight = armnn::numeric_cast<int32_t>(desc.m_BlockShape[0]); |
| 56 | int32_t blockWidth = armnn::numeric_cast<int32_t>(desc.m_BlockShape[1]); |
Mike Kelly | 831faed | 2018-11-28 11:52:08 +0000 | [diff] [blame] | 57 | |
| 58 | const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, dataLayout); |
| 59 | |
| 60 | const arm_compute::Status aclStatus = arm_compute::CLBatchToSpaceLayer::validate(&aclInputInfo, |
| 61 | blockWidth, |
| 62 | blockHeight, |
| 63 | &aclOutputInfo); |
| 64 | return aclStatus; |
| 65 | } |
| 66 | |
| 67 | } //namespace armnn |