blob: 22d5449466b0fe3f4d11bb8df03203e3079e3276 [file] [log] [blame]
Tianle Cheng988354d2023-06-28 13:20:47 +01001//
2// Copyright © 2023 Arm Ltd and Contributors. All rights reserved.
3// SPDX-License-Identifier: MIT
4//
5
6#include "RefReverseV2Workload.hpp"
7
8#include "ReverseV2Impl.hpp"
9#include "RefWorkloadUtils.hpp"
10#include "Profiling.hpp"
11
12namespace armnn
13{
14
15 RefReverseV2Workload::RefReverseV2Workload(const ReverseV2QueueDescriptor& descriptor, const WorkloadInfo& info)
16 : RefBaseWorkload(descriptor, info)
17 {}
18
19 void RefReverseV2Workload::Execute() const
20 {
21 Execute(m_Data.m_Inputs, m_Data.m_Outputs);
22 }
23
24 void RefReverseV2Workload::ExecuteAsync(ExecutionData& executionData)
25 {
26 WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
27 Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
28 }
29
30 void RefReverseV2Workload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
31 {
32 ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefReverseV2Workload_Execute");
33
34 const TensorInfo& inputInfo = GetTensorInfo(inputs[0]);
Tracy Narinebb8d7592023-07-13 16:50:54 +010035 const TensorInfo& axisInfo = GetTensorInfo(inputs[1]);
Tianle Cheng988354d2023-06-28 13:20:47 +010036
37 std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]),
38 inputs[0]->Map());
39
Tracy Narinebb8d7592023-07-13 16:50:54 +010040 std::unique_ptr<Decoder<int>> axisDecoder = MakeDecoder<int>(GetTensorInfo(inputs[1]),
41 inputs[1]->Map());
42
Tianle Cheng988354d2023-06-28 13:20:47 +010043 std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]),
44 outputs[0]->Map());
45
Tracy Narinebb8d7592023-07-13 16:50:54 +010046 ReverseV2(inputInfo,
47 axisInfo,
Tianle Cheng988354d2023-06-28 13:20:47 +010048 *inputDecoder,
Tracy Narinebb8d7592023-07-13 16:50:54 +010049 *axisDecoder,
Tianle Cheng988354d2023-06-28 13:20:47 +010050 *outputEncoder);
51 }
52
53} // namespace armnn