Matthew Sloyan | 3504e42 | 2023-05-03 13:53:02 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2023 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "RedefineTestHelper.hpp" |
| 7 | |
| 8 | namespace armnnDelegate |
| 9 | { |
| 10 | |
| 11 | void SqueezeSimpleTest(std::vector<armnn::BackendId>& backends) |
| 12 | { |
| 13 | // Set input data |
| 14 | std::vector<int32_t> inputShape { 1, 2, 2, 1 }; |
| 15 | std::vector<int32_t> outputShape { 2, 2 }; |
| 16 | std::vector<int32_t> squeezeDims { }; |
| 17 | |
| 18 | std::vector<float> inputValues = { 1, 2, 3, 4 }; |
| 19 | std::vector<float> expectedOutputValues = { 1, 2, 3, 4 }; |
| 20 | |
| 21 | RedefineTest<float>(tflite::BuiltinOperator_SQUEEZE, |
| 22 | ::tflite::TensorType_FLOAT32, |
| 23 | backends, |
| 24 | inputShape, |
| 25 | outputShape, |
| 26 | inputValues, |
| 27 | expectedOutputValues, |
| 28 | squeezeDims); |
| 29 | } |
| 30 | |
| 31 | void SqueezeWithDimsTest(std::vector<armnn::BackendId>& backends) |
| 32 | { |
| 33 | // Set input data |
| 34 | std::vector<int32_t> inputShape { 1, 2, 2, 1 }; |
| 35 | std::vector<int32_t> outputShape { 1, 2, 2 }; |
| 36 | std::vector<int32_t> squeezeDims { -1 }; |
| 37 | |
| 38 | std::vector<float> inputValues = { 1, 2, 3, 4 }; |
| 39 | std::vector<float> expectedOutputValues = { 1, 2, 3, 4 }; |
| 40 | |
| 41 | RedefineTest<float>(tflite::BuiltinOperator_SQUEEZE, |
| 42 | ::tflite::TensorType_FLOAT32, |
| 43 | backends, |
| 44 | inputShape, |
| 45 | outputShape, |
| 46 | inputValues, |
| 47 | expectedOutputValues, |
| 48 | squeezeDims); |
| 49 | } |
| 50 | |
| 51 | TEST_SUITE("Squeeze_GpuAccTests") |
| 52 | { |
| 53 | |
| 54 | TEST_CASE ("Squeeze_Simple_GpuAcc_Test") |
| 55 | { |
| 56 | std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc }; |
| 57 | SqueezeSimpleTest(backends); |
| 58 | } |
| 59 | |
| 60 | TEST_CASE ("Squeeze_With_Dims_GpuAcc_Test") |
| 61 | { |
| 62 | std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc }; |
| 63 | SqueezeWithDimsTest(backends); |
| 64 | } |
| 65 | |
| 66 | } // TEST_SUITE("Squeeze_GpuAccTests") |
| 67 | |
| 68 | TEST_SUITE("Squeeze_CpuAccTests") |
| 69 | { |
| 70 | |
| 71 | TEST_CASE ("Squeeze_Simple_CpuAcc_Test") |
| 72 | { |
| 73 | std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc }; |
| 74 | SqueezeSimpleTest(backends); |
| 75 | } |
| 76 | |
| 77 | TEST_CASE ("Squeeze_With_Dims_CpuAcc_Test") |
| 78 | { |
| 79 | std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc }; |
| 80 | SqueezeWithDimsTest(backends); |
| 81 | } |
| 82 | |
| 83 | } // TEST_SUITE("Squeeze_CpuAccTests") |
| 84 | |
| 85 | TEST_SUITE("Squeeze_CpuRefTests") |
| 86 | { |
| 87 | |
| 88 | TEST_CASE ("Squeeze_Simple_CpuRef_Test") |
| 89 | { |
| 90 | std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; |
| 91 | SqueezeSimpleTest(backends); |
| 92 | } |
| 93 | |
| 94 | TEST_CASE ("Squeeze_With_Dims_CpuRef_Test") |
| 95 | { |
| 96 | std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; |
| 97 | SqueezeWithDimsTest(backends); |
| 98 | } |
| 99 | |
| 100 | } // TEST_SUITE("Squeeze_CpuRefTests") |
| 101 | |
| 102 | } // namespace armnnDelegate |