Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2021 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "UnpackTestHelper.hpp" |
| 7 | |
| 8 | #include <armnn_delegate.hpp> |
| 9 | |
| 10 | #include <flatbuffers/flatbuffers.h> |
| 11 | #include <tensorflow/lite/schema/schema_generated.h> |
| 12 | |
| 13 | #include <doctest/doctest.h> |
| 14 | |
| 15 | namespace armnnDelegate |
| 16 | { |
| 17 | |
| 18 | template <typename T> |
| 19 | void UnpackAxis0Num4Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends) |
| 20 | { |
| 21 | std::vector<int32_t> inputShape { 4, 1, 6 }; |
| 22 | std::vector<int32_t> expectedOutputShape { 1, 6 }; |
| 23 | |
| 24 | std::vector<T> inputValues { 1, 2, 3, 4, 5, 6, |
| 25 | 7, 8, 9, 10, 11, 12, |
| 26 | 13, 14, 15, 16, 17, 18, |
| 27 | 19, 20, 21, 22, 23, 24 }; |
| 28 | |
| 29 | std::vector<T> expectedOutputValues0 { 1, 2, 3, 4, 5, 6 }; |
| 30 | std::vector<T> expectedOutputValues1 { 7, 8, 9, 10, 11, 12 }; |
| 31 | std::vector<T> expectedOutputValues2 { 13, 14, 15, 16, 17, 18 }; |
| 32 | std::vector<T> expectedOutputValues3 { 19, 20, 21, 22, 23, 24 }; |
| 33 | |
| 34 | std::vector<std::vector<T>> expectedOutputValues{ expectedOutputValues0, |
| 35 | expectedOutputValues1, |
| 36 | expectedOutputValues2, |
| 37 | expectedOutputValues3 }; |
| 38 | |
| 39 | UnpackTest<T>(tflite::BuiltinOperator_UNPACK, |
| 40 | tensorType, |
| 41 | backends, |
| 42 | inputShape, |
| 43 | expectedOutputShape, |
| 44 | inputValues, |
| 45 | expectedOutputValues, |
| 46 | 0); |
| 47 | } |
| 48 | |
| 49 | template <typename T> |
| 50 | void UnpackAxis2Num6Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends) |
| 51 | { |
| 52 | std::vector<int32_t> inputShape { 4, 1, 6 }; |
| 53 | std::vector<int32_t> expectedOutputShape { 4, 1 }; |
| 54 | |
| 55 | std::vector<T> inputValues { 1, 2, 3, 4, 5, 6, |
| 56 | 7, 8, 9, 10, 11, 12, |
| 57 | 13, 14, 15, 16, 17, 18, |
| 58 | 19, 20, 21, 22, 23, 24 }; |
| 59 | |
| 60 | std::vector<T> expectedOutputValues0 { 1, 7, 13, 19 }; |
| 61 | std::vector<T> expectedOutputValues1 { 2, 8, 14, 20 }; |
| 62 | std::vector<T> expectedOutputValues2 { 3, 9, 15, 21 }; |
| 63 | std::vector<T> expectedOutputValues3 { 4, 10, 16, 22 }; |
| 64 | std::vector<T> expectedOutputValues4 { 5, 11, 17, 23 }; |
| 65 | std::vector<T> expectedOutputValues5 { 6, 12, 18, 24 }; |
| 66 | |
| 67 | std::vector<std::vector<T>> expectedOutputValues{ expectedOutputValues0, |
| 68 | expectedOutputValues1, |
| 69 | expectedOutputValues2, |
| 70 | expectedOutputValues3, |
| 71 | expectedOutputValues4, |
| 72 | expectedOutputValues5 }; |
| 73 | |
| 74 | UnpackTest<T>(tflite::BuiltinOperator_UNPACK, |
| 75 | tensorType, |
| 76 | backends, |
| 77 | inputShape, |
| 78 | expectedOutputShape, |
| 79 | inputValues, |
| 80 | expectedOutputValues, |
| 81 | 2); |
| 82 | } |
| 83 | |
| 84 | TEST_SUITE("Unpack_CpuRefTests") |
| 85 | { |
| 86 | |
| 87 | // Fp32 |
| 88 | TEST_CASE ("Unpack_Fp32_Axis0_Num4_CpuRef_Test") |
| 89 | { |
| 90 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 91 | UnpackAxis0Num4Test<float>(tflite::TensorType_FLOAT32, backends); |
| 92 | } |
| 93 | |
| 94 | TEST_CASE ("Unpack_Fp32_Axis2_Num6_CpuRef_Test") |
| 95 | { |
| 96 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 97 | UnpackAxis2Num6Test<float>(tflite::TensorType_FLOAT32, backends); |
| 98 | } |
| 99 | |
| 100 | // Uint8 |
| 101 | TEST_CASE ("Unpack_Uint8_Axis0_Num4_CpuRef_Test") |
| 102 | { |
| 103 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 104 | UnpackAxis0Num4Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 105 | } |
| 106 | |
| 107 | TEST_CASE ("Unpack_Uint8_Axis2_Num6_CpuRef_Test") |
| 108 | { |
| 109 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 110 | UnpackAxis2Num6Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 111 | } |
| 112 | |
| 113 | } // End of Unpack_CpuRefTests |
| 114 | |
| 115 | TEST_SUITE("Unpack_CpuAccTests") |
| 116 | { |
| 117 | |
| 118 | // Fp32 |
| 119 | TEST_CASE ("Unpack_Fp32_Axis0_Num4_CpuAcc_Test") |
| 120 | { |
| 121 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 122 | UnpackAxis0Num4Test<float>(tflite::TensorType_FLOAT32, backends); |
| 123 | } |
| 124 | |
Kevin May | 4cad860 | 2021-05-18 09:57:43 +0100 | [diff] [blame] | 125 | TEST_CASE ("Unpack_Fp32_Axis2_Num6_CpuAcc_Test") |
| 126 | { |
| 127 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 128 | UnpackAxis2Num6Test<float>(tflite::TensorType_FLOAT32, backends); |
| 129 | } |
| 130 | |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 131 | // Uint8 |
| 132 | TEST_CASE ("Unpack_Uint8_Axis0_Num4_CpuAcc_Test") |
| 133 | { |
| 134 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 135 | UnpackAxis0Num4Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 136 | } |
| 137 | |
Kevin May | 4cad860 | 2021-05-18 09:57:43 +0100 | [diff] [blame] | 138 | TEST_CASE ("Unpack_Uint8_Axis2_Num6_CpuAcc_Test") |
| 139 | { |
| 140 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 141 | UnpackAxis2Num6Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 142 | } |
| 143 | |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 144 | } // End of Unpack_CpuAccTests |
| 145 | |
| 146 | TEST_SUITE("Unpack_GpuAccTests") |
| 147 | { |
| 148 | |
| 149 | // Fp32 |
| 150 | TEST_CASE ("Unpack_Fp32_Axis0_Num4_GpuAcc_Test") |
| 151 | { |
| 152 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 153 | UnpackAxis0Num4Test<float>(tflite::TensorType_FLOAT32, backends); |
| 154 | } |
| 155 | |
Kevin May | 4cad860 | 2021-05-18 09:57:43 +0100 | [diff] [blame] | 156 | TEST_CASE ("Unpack_Fp32_Axis2_Num6_GpuAcc_Test") |
| 157 | { |
| 158 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 159 | UnpackAxis2Num6Test<float>(tflite::TensorType_FLOAT32, backends); |
| 160 | } |
| 161 | |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 162 | // Uint8 |
| 163 | TEST_CASE ("Unpack_Uint8_Axis0_Num4_GpuAcc_Test") |
| 164 | { |
| 165 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 166 | UnpackAxis0Num4Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 167 | } |
| 168 | |
Kevin May | 4cad860 | 2021-05-18 09:57:43 +0100 | [diff] [blame] | 169 | TEST_CASE ("Unpack_Uint8_Axis2_Num6_GpuAcc_Test") |
| 170 | { |
| 171 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 172 | UnpackAxis2Num6Test<uint8_t>(tflite::TensorType_UINT8, backends); |
| 173 | } |
| 174 | |
Kevin May | 8ab2d7a | 2021-05-07 09:32:51 +0100 | [diff] [blame] | 175 | } // End of Unpack_GpuAccTests |
| 176 | |
| 177 | // End of Unpack Test Suite |
| 178 | |
| 179 | } // namespace armnnDelegate |