Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2020 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
| 8 | #include <armnn/ArmNN.hpp> |
| 9 | #include <armnn/BackendHelper.hpp> |
| 10 | #include <armnn/utility/Assert.hpp> |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 11 | #include <armnn/utility/NumericCast.hpp> |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 12 | |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 13 | #include <armnnUtils/Permute.hpp> |
| 14 | |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 15 | #include <tensorflow/lite/builtin_ops.h> |
| 16 | #include <tensorflow/lite/c/builtin_op_data.h> |
| 17 | #include <tensorflow/lite/c/common.h> |
| 18 | #include <tensorflow/lite/minimal_logging.h> |
| 19 | |
| 20 | namespace |
| 21 | { |
| 22 | |
| 23 | // Macro to call an Is<layer_name>Supported function and log caller name together with reason for lack of support |
| 24 | #define FORWARD_LAYER_SUPPORT_FUNC(funcName, tfLiteContext, func, backends, supported, ...) \ |
| 25 | try \ |
| 26 | { \ |
| 27 | for (auto&& backendId : backends) \ |
| 28 | { \ |
| 29 | auto layerSupportObject = armnn::GetILayerSupportByBackendId(backendId); \ |
| 30 | if (layerSupportObject) \ |
| 31 | { \ |
| 32 | std::string reasonIfUnsupported; \ |
| 33 | supported = \ |
| 34 | layerSupportObject->func(__VA_ARGS__, armnn::Optional<std::string&>(reasonIfUnsupported)); \ |
| 35 | if (supported) \ |
| 36 | { \ |
| 37 | break; \ |
| 38 | } \ |
| 39 | else \ |
| 40 | { \ |
| 41 | if (reasonIfUnsupported.size() > 0) \ |
| 42 | { \ |
| 43 | TF_LITE_KERNEL_LOG( \ |
| 44 | tfLiteContext, "%s: not supported by armnn: %s", funcName, reasonIfUnsupported.c_str()); \ |
| 45 | } \ |
| 46 | else \ |
| 47 | { \ |
| 48 | TF_LITE_KERNEL_LOG(tfLiteContext, "%s: not supported by armnn", funcName); \ |
| 49 | } \ |
| 50 | } \ |
| 51 | } \ |
| 52 | else \ |
| 53 | { \ |
| 54 | TF_LITE_KERNEL_LOG(tfLiteContext, "%s: backend not registered: %s", funcName, backendId.Get().c_str()); \ |
| 55 | } \ |
| 56 | } \ |
| 57 | if (!supported) \ |
| 58 | { \ |
| 59 | TF_LITE_KERNEL_LOG(tfLiteContext, "%s: not supported by any specified backend", funcName); \ |
| 60 | } \ |
| 61 | } \ |
| 62 | catch (const armnn::InvalidArgumentException &e) \ |
| 63 | { \ |
| 64 | throw armnn::InvalidArgumentException(e, "Failed to check layer support", CHECK_LOCATION()); \ |
| 65 | } |
| 66 | |
| 67 | TfLiteStatus ValidateNumInputs(TfLiteContext* tfLiteContext, |
| 68 | TfLiteNode* tfLiteNode, |
| 69 | const unsigned int expectedSize, |
| 70 | int nodeIndex) |
| 71 | { |
| 72 | auto numInputs = tfLiteNode->inputs->size; |
| 73 | if (numInputs != expectedSize) |
| 74 | { |
| 75 | TF_LITE_MAYBE_KERNEL_LOG( |
| 76 | tfLiteContext, "TfLiteArmnnDelegate: Unexpected number of inputs (%d != %d) in node #%d", |
| 77 | numInputs, expectedSize, nodeIndex); |
| 78 | return kTfLiteError; |
| 79 | } |
| 80 | return kTfLiteOk; |
| 81 | } |
| 82 | |
| 83 | TfLiteStatus ValidateNumOutputs(TfLiteContext* tfLiteContext, |
| 84 | TfLiteNode* tfLiteNode, |
| 85 | const unsigned int expectedSize, |
| 86 | int nodeIndex) |
| 87 | { |
| 88 | auto numOutputs = tfLiteNode->outputs->size; |
| 89 | if (numOutputs != expectedSize) |
| 90 | { |
| 91 | TF_LITE_MAYBE_KERNEL_LOG( |
| 92 | tfLiteContext, "TfLiteArmnnDelegate: Unexpected number of outputs (%d != %d) in node #%d", |
| 93 | numOutputs, expectedSize, nodeIndex); |
| 94 | return kTfLiteError; |
| 95 | } |
| 96 | return kTfLiteOk; |
| 97 | } |
| 98 | |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 99 | bool IsValid(const TfLiteTensor* tfLiteTensor) |
| 100 | { |
| 101 | return tfLiteTensor == nullptr ? false : true; |
| 102 | } |
| 103 | |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 104 | bool IsDynamicTensor(const TfLiteTensor& tfLiteTensor) |
| 105 | { |
| 106 | auto tensorAllocationType = tfLiteTensor.allocation_type; |
| 107 | if (tensorAllocationType == kTfLiteDynamic) |
| 108 | { |
| 109 | return true; |
| 110 | } |
| 111 | return false; |
| 112 | } |
| 113 | |
Matthew Sloyan | 0d35a93 | 2020-11-09 12:25:05 +0000 | [diff] [blame] | 114 | bool IsAffineQuantization(const TfLiteTensor& tfLiteTensor) |
| 115 | { |
| 116 | auto quantizationInfo = tfLiteTensor.quantization; |
| 117 | if (quantizationInfo.type == kTfLiteAffineQuantization) |
| 118 | { |
| 119 | return true; |
| 120 | } |
| 121 | return false; |
| 122 | } |
| 123 | |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 124 | TfLiteStatus Connect(armnn::IConnectableLayer* layer, |
| 125 | TfLiteNode* tfLiteNode, |
| 126 | armnnDelegate::DelegateData& data) |
| 127 | { |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 128 | ARMNN_ASSERT(tfLiteNode->outputs->size == layer->GetNumOutputSlots()); |
| 129 | |
| 130 | // Connect the input slots |
| 131 | for (unsigned int inputIndex = 0; inputIndex < layer->GetNumInputSlots(); ++inputIndex) |
| 132 | { |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 133 | if (data.m_OutputSlotForNode[tfLiteNode->inputs->data[inputIndex]] != nullptr) |
| 134 | { |
| 135 | data.m_OutputSlotForNode[tfLiteNode->inputs->data[inputIndex]]->Connect(layer->GetInputSlot(inputIndex)); |
| 136 | } |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 137 | } |
| 138 | |
| 139 | // Prepare output slots |
| 140 | for (unsigned int outputIndex = 0; outputIndex < layer->GetNumOutputSlots(); ++outputIndex) |
| 141 | { |
| 142 | armnn::IOutputSlot& outputSlot = layer->GetOutputSlot(outputIndex); |
| 143 | data.m_OutputSlotForNode[tfLiteNode->outputs->data[outputIndex]] = &outputSlot; |
| 144 | } |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 145 | |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 146 | return kTfLiteOk; |
| 147 | } |
| 148 | |
| 149 | armnn::IConnectableLayer* BroadcastTensor(const armnn::TensorInfo& inputInfo0, |
| 150 | const armnn::TensorInfo& inputInfo1, |
| 151 | armnn::IConnectableLayer* startLayer, |
| 152 | TfLiteContext* tfLiteContext, |
| 153 | TfLiteNode* tfLiteNode, |
| 154 | armnnDelegate::DelegateData& delegateData) |
| 155 | { |
| 156 | unsigned int inputDimensions0 = inputInfo0.GetNumDimensions(); |
| 157 | unsigned int inputDimensions1 = inputInfo1.GetNumDimensions(); |
| 158 | |
| 159 | if (inputDimensions0 == inputDimensions1) |
| 160 | { |
| 161 | auto status = Connect(startLayer, tfLiteNode, delegateData); |
Sadik Armagan | 8b9858d | 2020-11-09 08:26:22 +0000 | [diff] [blame] | 162 | return status == kTfLiteOk ? startLayer : nullptr; |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 163 | } |
| 164 | |
| 165 | unsigned int biggerInputDimensions = std::max(inputDimensions0, inputDimensions1); |
| 166 | unsigned int dimDifference = |
| 167 | std::abs(armnn::numeric_cast<int>(inputDimensions0) - armnn::numeric_cast<int>(inputDimensions1)); |
| 168 | |
| 169 | bool input0IsSmaller = inputDimensions0 < inputDimensions1; |
| 170 | const armnn::TensorInfo& smallInfo = input0IsSmaller ? inputInfo0 : inputInfo1; |
| 171 | const armnn::TensorShape& smallShape = smallInfo.GetShape(); |
| 172 | |
| 173 | std::vector<unsigned int> reshapedDimensions(biggerInputDimensions, 1); |
| 174 | for (unsigned int i = dimDifference; i < biggerInputDimensions; ++i) |
| 175 | { |
| 176 | reshapedDimensions[i] = smallShape[i - dimDifference]; |
| 177 | } |
| 178 | |
| 179 | armnn::TensorInfo reshapedInfo = smallInfo; |
| 180 | reshapedInfo.SetShape(armnn::TensorShape{ armnn::numeric_cast<unsigned int>(reshapedDimensions.size()), |
| 181 | reshapedDimensions.data() }); |
| 182 | |
| 183 | armnn::ReshapeDescriptor reshapeDescriptor; |
| 184 | bool isSupported = false; |
| 185 | FORWARD_LAYER_SUPPORT_FUNC(__func__, |
| 186 | tfLiteContext, |
| 187 | IsReshapeSupported, |
| 188 | delegateData.m_Backends, |
| 189 | isSupported, |
| 190 | smallInfo, |
| 191 | reshapedInfo, |
| 192 | reshapeDescriptor); |
| 193 | if (!isSupported) |
| 194 | { |
| 195 | return nullptr; |
| 196 | } |
| 197 | |
| 198 | ARMNN_ASSERT(delegateData.m_Network != nullptr); |
| 199 | // Add Reshape layer |
| 200 | reshapeDescriptor.m_TargetShape = reshapedInfo.GetShape(); |
| 201 | |
| 202 | armnn::IConnectableLayer* reshapeLayer = delegateData.m_Network->AddReshapeLayer(reshapeDescriptor); |
| 203 | ARMNN_ASSERT(reshapeLayer != nullptr); |
| 204 | reshapeLayer->GetOutputSlot(0).SetTensorInfo(reshapedInfo); |
| 205 | |
| 206 | if (input0IsSmaller) |
| 207 | { |
| 208 | delegateData.m_OutputSlotForNode[tfLiteNode->inputs->data[0]]->Connect(reshapeLayer->GetInputSlot(0)); |
| 209 | reshapeLayer->GetOutputSlot(0).Connect(startLayer->GetInputSlot(0)); |
| 210 | delegateData.m_OutputSlotForNode[tfLiteNode->inputs->data[1]]->Connect(startLayer->GetInputSlot(1)); |
| 211 | } |
| 212 | else |
| 213 | { |
| 214 | delegateData.m_OutputSlotForNode[tfLiteNode->inputs->data[1]]->Connect(reshapeLayer->GetInputSlot(0)); |
| 215 | reshapeLayer->GetOutputSlot(0).Connect(startLayer->GetInputSlot(1)); |
| 216 | delegateData.m_OutputSlotForNode[tfLiteNode->inputs->data[0]]->Connect(startLayer->GetInputSlot(0)); |
| 217 | } |
| 218 | |
| 219 | // Prepare output slots |
| 220 | for (unsigned int outputIndex = 0; outputIndex < startLayer->GetNumOutputSlots(); ++outputIndex) |
| 221 | { |
| 222 | armnn::IOutputSlot& outputSlot = startLayer->GetOutputSlot(outputIndex); |
| 223 | delegateData.m_OutputSlotForNode[tfLiteNode->outputs->data[outputIndex]] = &outputSlot; |
| 224 | } |
| 225 | |
| 226 | return reshapeLayer; |
| 227 | } |
| 228 | |
| 229 | TfLiteStatus FusedActivation(TfLiteContext* tfLiteContext, |
| 230 | TfLiteNode* tfLiteNode, |
| 231 | TfLiteFusedActivation activationType, |
| 232 | armnn::IConnectableLayer* prevLayer, |
| 233 | unsigned int outputSlotIndex, |
| 234 | armnnDelegate::DelegateData& data) |
| 235 | { |
| 236 | |
| 237 | armnn::IOutputSlot& outputSlot = prevLayer->GetOutputSlot(outputSlotIndex); |
| 238 | const armnn::TensorInfo& activationOutputInfo = outputSlot.GetTensorInfo(); |
| 239 | |
| 240 | armnn::ActivationDescriptor activationDesc; |
| 241 | |
| 242 | switch (activationType) |
| 243 | { |
| 244 | case kTfLiteActNone: |
| 245 | { |
| 246 | // No Activation |
| 247 | return kTfLiteOk; |
| 248 | } |
| 249 | case kTfLiteActRelu: |
| 250 | { |
| 251 | activationDesc.m_Function = armnn::ActivationFunction::ReLu; |
| 252 | break; |
| 253 | } |
| 254 | case kTfLiteActRelu1: |
| 255 | { |
| 256 | activationDesc.m_Function = armnn::ActivationFunction::BoundedReLu; |
| 257 | activationDesc.m_A = 1.0f; |
| 258 | activationDesc.m_B = -1.0f; |
| 259 | break; |
| 260 | } |
| 261 | case kTfLiteActRelu6: |
| 262 | { |
| 263 | activationDesc.m_Function = armnn::ActivationFunction::BoundedReLu; |
| 264 | activationDesc.m_A = 6.0f; |
| 265 | activationDesc.m_B = 0.0f; |
| 266 | break; |
| 267 | } |
| 268 | case kTfLiteActSigmoid: |
| 269 | { |
| 270 | activationDesc.m_Function = armnn::ActivationFunction::Sigmoid; |
| 271 | break; |
| 272 | } |
| 273 | case kTfLiteActTanh: |
| 274 | { |
| 275 | activationDesc.m_Function = armnn::ActivationFunction::TanH; |
| 276 | activationDesc.m_A = 1.0f; |
| 277 | activationDesc.m_B = 1.0f; |
| 278 | break; |
| 279 | } |
| 280 | default: |
| 281 | return kTfLiteError; |
| 282 | } |
| 283 | |
| 284 | bool isSupported = false; |
| 285 | FORWARD_LAYER_SUPPORT_FUNC(__func__, |
| 286 | tfLiteContext, |
| 287 | IsActivationSupported, |
| 288 | data.m_Backends, |
| 289 | isSupported, |
| 290 | prevLayer->GetOutputSlot(0).GetTensorInfo(), |
| 291 | activationOutputInfo, |
| 292 | activationDesc); |
| 293 | if (!isSupported) |
| 294 | { |
| 295 | return kTfLiteError; |
| 296 | } |
| 297 | armnn::IConnectableLayer* activationLayer = data.m_Network->AddActivationLayer(activationDesc); |
| 298 | |
| 299 | ARMNN_ASSERT(activationLayer != nullptr); |
| 300 | activationLayer->GetOutputSlot(0).SetTensorInfo(activationOutputInfo); |
| 301 | |
| 302 | // Connect and prepare output slots |
| 303 | for (unsigned int outputIndex = 0; outputIndex < activationLayer->GetNumOutputSlots(); ++outputIndex) |
| 304 | { |
| 305 | data.m_OutputSlotForNode[tfLiteNode->outputs->data[outputIndex]]->Connect(activationLayer->GetInputSlot(0)); |
| 306 | armnn::IOutputSlot& outputSlot = activationLayer->GetOutputSlot(outputIndex); |
| 307 | data.m_OutputSlotForNode[tfLiteNode->outputs->data[outputIndex]] = &outputSlot; |
| 308 | } |
| 309 | return kTfLiteOk; |
| 310 | } |
| 311 | |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 312 | armnn::DataType GetDataType(const TfLiteTensor& tfLiteTensor) |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 313 | { |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 314 | switch (tfLiteTensor.type) |
| 315 | { |
| 316 | case kTfLiteBool: |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 317 | return armnn::DataType::Boolean; |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 318 | case kTfLiteFloat32: |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 319 | return armnn::DataType::Float32; |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 320 | case kTfLiteFloat16: |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 321 | return armnn::DataType::Float16; |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 322 | case kTfLiteUInt8: |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 323 | return armnn::DataType::QAsymmU8; |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 324 | case kTfLiteInt8: |
Narumol Prangnawarat | 50c87d3 | 2020-11-09 18:42:11 +0000 | [diff] [blame] | 325 | if (tfLiteTensor.params.zero_point == 0) |
| 326 | { |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 327 | return armnn::DataType::QSymmS8; |
Narumol Prangnawarat | 50c87d3 | 2020-11-09 18:42:11 +0000 | [diff] [blame] | 328 | } |
| 329 | else |
| 330 | { |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 331 | return armnn::DataType::QAsymmS8; |
Narumol Prangnawarat | 50c87d3 | 2020-11-09 18:42:11 +0000 | [diff] [blame] | 332 | } |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 333 | case kTfLiteInt16: |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 334 | return armnn::DataType::QSymmS16; |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 335 | case kTfLiteInt32: |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 336 | return armnn::DataType::Signed32; |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 337 | default: |
| 338 | throw armnn::Exception("TfLiteArmnnDelegate: Unsupported data type: " + tfLiteTensor.type); |
| 339 | } |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 340 | } |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 341 | |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 342 | armnn::TensorInfo GetTensorInfoForTfLiteTensor(const TfLiteTensor& tfLiteTensor) |
| 343 | { |
| 344 | armnn::DataType type = GetDataType(tfLiteTensor); |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 345 | armnn::TensorInfo ret; |
| 346 | auto tensorDimensionSize = tfLiteTensor.dims->size; |
| 347 | if (tensorDimensionSize == 0) |
| 348 | { |
| 349 | armnn::TensorShape tensorShape(armnn::Dimensionality::NotSpecified); |
| 350 | ret = armnn::TensorInfo(tensorShape, type); |
| 351 | } |
| 352 | else |
| 353 | { |
| 354 | std::vector<unsigned int> tensorDims(tensorDimensionSize); |
| 355 | bool dimensionsSpecificity[5] = { true, true, true, true, true }; |
| 356 | for (unsigned int i = 0; i < tensorDimensionSize; ++i) { |
| 357 | auto dim = tfLiteTensor.dims->data[i]; |
| 358 | if (dim == 0) |
| 359 | { |
| 360 | dimensionsSpecificity[i] = false; |
| 361 | } |
| 362 | tensorDims[i] = dim; |
| 363 | } |
| 364 | armnn::TensorShape tensorShape(tensorDimensionSize, tensorDims.data(), dimensionsSpecificity); |
| 365 | ret = armnn::TensorInfo(tensorShape, type); |
| 366 | } |
| 367 | |
| 368 | auto quantizationInfo = tfLiteTensor.quantization; |
| 369 | if (quantizationInfo.type == kTfLiteAffineQuantization) |
| 370 | { |
| 371 | // get per-channel quantization parameters |
| 372 | const auto* affineQuantization = |
| 373 | reinterpret_cast<TfLiteAffineQuantization*>(tfLiteTensor.quantization.params); |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 374 | if (affineQuantization->scale->size > 1) |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 375 | { |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 376 | std::vector<float> quantizationScales; |
| 377 | for (unsigned int i = 1; i < affineQuantization->scale->size; ++i) |
| 378 | { |
| 379 | quantizationScales.push_back(affineQuantization->scale->data[i]); |
| 380 | } |
| 381 | ret.SetQuantizationScales(quantizationScales); |
| 382 | ret.SetQuantizationDim(armnn::MakeOptional<unsigned int>(affineQuantization->quantized_dimension)); |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 383 | } |
Sadik Armagan | 67e95f2 | 2020-10-29 16:14:54 +0000 | [diff] [blame] | 384 | else |
| 385 | { |
| 386 | ret.SetQuantizationScale(affineQuantization->scale->data[0]); |
| 387 | ret.SetQuantizationOffset(affineQuantization->zero_point->data[0]); |
| 388 | } |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 389 | } |
| 390 | else |
| 391 | { |
| 392 | auto quantizationParameters = tfLiteTensor.params; |
| 393 | ret.SetQuantizationScale(quantizationParameters.scale); |
| 394 | ret.SetQuantizationOffset(quantizationParameters.zero_point); |
| 395 | } |
| 396 | |
| 397 | return ret; |
| 398 | } |
| 399 | |
Sadik Armagan | 4189cc5 | 2020-11-11 18:01:48 +0000 | [diff] [blame] | 400 | armnn::ConstTensor CreateConstTensor(const TfLiteTensor* tfLiteTensor, |
| 401 | armnn::TensorInfo& tensorInfo, |
| 402 | armnn::Optional<armnn::PermutationVector&> permutationVector) |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 403 | { |
Sadik Armagan | 4189cc5 | 2020-11-11 18:01:48 +0000 | [diff] [blame] | 404 | if (tfLiteTensor->allocation_type != kTfLiteMmapRo) |
| 405 | { |
| 406 | throw armnn::Exception("TfLiteArmnnDelegate: Not constant allocation type: " + tfLiteTensor->allocation_type); |
| 407 | } |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 408 | |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 409 | if (permutationVector.has_value() && permutationVector.value().GetSize() > 0) |
| 410 | { |
Sadik Armagan | 4189cc5 | 2020-11-11 18:01:48 +0000 | [diff] [blame] | 411 | std::vector<uint8_t> swizzledData; |
| 412 | swizzledData.resize(tensorInfo.GetNumBytes()); |
| 413 | armnnUtils::Permute(armnnUtils::Permuted(tensorInfo.GetShape(), permutationVector.value()), |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 414 | permutationVector.value(), |
Sadik Armagan | 4189cc5 | 2020-11-11 18:01:48 +0000 | [diff] [blame] | 415 | tfLiteTensor->data.data, |
| 416 | swizzledData.data(), |
| 417 | armnn::GetDataTypeSize(tensorInfo.GetDataType())); |
| 418 | return armnn::ConstTensor(armnnUtils::Permuted(tensorInfo, permutationVector.value()), swizzledData.data()); |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 419 | } |
| 420 | else |
| 421 | { |
Sadik Armagan | 4189cc5 | 2020-11-11 18:01:48 +0000 | [diff] [blame] | 422 | return armnn::ConstTensor(tensorInfo, tfLiteTensor->data.data); |
Sadik Armagan | 6e36a64 | 2020-11-10 21:18:41 +0000 | [diff] [blame] | 423 | } |
| 424 | } |
| 425 | |
Sadik Armagan | 62483be | 2020-10-23 17:14:43 +0100 | [diff] [blame] | 426 | } // namespace anonymous |