Nattapat Chaimanowong | 55b1cda | 2018-10-10 14:51:27 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #pragma once |
| 7 | |
Mike Kelly | 0886ac4 | 2020-04-27 09:55:40 +0100 | [diff] [blame] | 8 | #include <arm_compute/core/Error.h> |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 9 | #include <backendsCommon/Workload.hpp> |
Nattapat Chaimanowong | 55b1cda | 2018-10-10 14:51:27 +0100 | [diff] [blame] | 10 | |
Nattapat Chaimanowong | 55b1cda | 2018-10-10 14:51:27 +0100 | [diff] [blame] | 11 | namespace armnn |
| 12 | { |
Mike Kelly | 0886ac4 | 2020-04-27 09:55:40 +0100 | [diff] [blame] | 13 | arm_compute::Status ClConstantWorkloadValidate(const TensorInfo& output); |
| 14 | |
Nattapat Chaimanowong | 55b1cda | 2018-10-10 14:51:27 +0100 | [diff] [blame] | 15 | class ClConstantWorkload : public BaseWorkload<ConstantQueueDescriptor> |
| 16 | { |
| 17 | public: |
| 18 | ClConstantWorkload(const ConstantQueueDescriptor& descriptor, const WorkloadInfo& info); |
| 19 | |
| 20 | void Execute() const override; |
| 21 | |
| 22 | private: |
| 23 | mutable bool m_RanOnce; |
| 24 | }; |
| 25 | |
| 26 | } //namespace armnn |