telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | #include "MemCopyWorkload.hpp" |
David Beck | ac42efd | 2018-09-26 17:41:13 +0100 | [diff] [blame] | 6 | #include "CpuTensorHandle.hpp" |
| 7 | #include <TypeUtils.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 8 | |
| 9 | #include <cstring> |
| 10 | #include <boost/cast.hpp> |
| 11 | |
| 12 | namespace armnn |
| 13 | { |
| 14 | |
| 15 | namespace |
| 16 | { |
| 17 | |
| 18 | template <typename SrcTensorHandleType, typename DstTensorHandleType> |
| 19 | void GatherTensorHandlePairs(const MemCopyQueueDescriptor& descriptor, |
| 20 | std::vector<std::pair<SrcTensorHandleType*, DstTensorHandleType*>>& tensorHandlePairs) |
| 21 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 22 | const unsigned int numInputs = static_cast<unsigned int>(descriptor.m_Inputs.size()); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 23 | tensorHandlePairs.reserve(numInputs); |
| 24 | |
| 25 | for (unsigned int i = 0; i < numInputs; ++i) |
| 26 | { |
| 27 | SrcTensorHandleType* const srcTensorHandle = boost::polymorphic_downcast<SrcTensorHandleType*>( |
| 28 | descriptor.m_Inputs[i]); |
| 29 | DstTensorHandleType* const dstTensorHandle = boost::polymorphic_downcast<DstTensorHandleType*>( |
| 30 | descriptor.m_Outputs[i]); |
| 31 | |
| 32 | tensorHandlePairs.emplace_back(srcTensorHandle, dstTensorHandle); |
| 33 | } |
| 34 | } |
| 35 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 36 | } //namespace |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 37 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 38 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 39 | CopyMemGenericWorkload::CopyMemGenericWorkload(const MemCopyQueueDescriptor& descriptor, |
| 40 | const WorkloadInfo& info) |
| 41 | : BaseWorkload<MemCopyQueueDescriptor>(descriptor, info) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 42 | { |
| 43 | GatherTensorHandlePairs(descriptor, m_TensorHandlePairs); |
| 44 | } |
| 45 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 46 | void CopyMemGenericWorkload::Execute() const |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 47 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 48 | ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "CopyMemGeneric_Execute"); |
| 49 | |
| 50 | auto copyFunc = [](void* dst, const void* src, size_t size) |
| 51 | { |
| 52 | memcpy(dst, src, size); |
| 53 | }; |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 54 | |
| 55 | for (const auto& pair : m_TensorHandlePairs) |
| 56 | { |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 57 | CopyTensorContentsGeneric(pair.first, pair.second, copyFunc); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 58 | } |
| 59 | } |
| 60 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 61 | } //namespace armnn |